AM335x Hardware Design Guide

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== Hardware Design Timeline → ==

Constructing the Block Diagram Selecting the Boot Mode Confirming Pin Multiplexing Compatibility Confirming Electrical and Timing Compatibility Designing the Power Subsystem Designing the Clocking Subsystem Floorplanning the PCB Creating the Schematics Laying out the PCB Testing / Debugging

 

Introduction

Welcome to the Hardware Design Guide. The purpose of this guide is to walk hardware designers through the various stages of designing a board on this platform. The guide follows the structure shown in the Hardware Design Timeline above. Each design stage in the Timeline links to a collection of useful documentation, application notes, and design recommendations pertaining to that stage. Using this Guide, hardware designers can efficiently locate the resources they need at every step in the board design flow.

Constructing the Block Diagram

The first step in designing the hardware platform is to create a detailed block diagram.  The block diagram should contain all major system ICs and illustrate which I/O ports are used for device interconnection.  Below is a collection of resources to aid in the Block Diagram creation process.


Selecting the Boot Mode

The block diagram should also indicate which interface will be used for booting this device.

Confirming Pin Multiplexing Compatibility

The AM335x device contains many peripheral interfaces. In order to reduce package costs while maintaining maximum functionality, many Approximately half of the AM335x terminals can multiplex up to eight signal functions. Although there are many combinations of pin-multiplexing that are possible, only a certain number of sets , called IO sets, are valid due to timing limitations. These valid IO sets were carefully chosen to provide many possible application scenarios for the user.

Texas Instruments has developed a Windows application called Pin Mux Utility that helps a system designer select the appropriate pin-multiplexing configuration for their AM335x based product design. This tool provides a way to select valid IO Sets of specific peripheral interfaces to insure the pin-multiplexing configuration selected for a design only uses valid IO Sets supported by AM335x.

Confirming Electrical and Timing Compatibility

A key step in the hardware design before beginning schematic capture is to confirm both DC and AC electrical compatibility between this device and the other ICs connected to it.

Designing the Power Subsystem

Once the block diagram has been validated for pin multiplexing, electrical, and timing compatibility, the power sub-system can be designed. See the below resources on estimating power consumption and designing a matching power subsystem.

Feature TPS65217A TPS65217B TPS65910A TPS65910A3 TPS650250
Integrated Battery Charger AC/USB AC/USB No No No
Drivers WLED backlighting WLED backlighting Boost 5V/100mA for LED Boost 5V/100mA for LED No
Power 3 DCDC
4 LDO
3 DCDC
4 LDO
3 DCDC
9 LDO
3 DCDC
9 LDO
3 DCDC
3 LDO
Max Current DCDC 3x1.2A
LDO 2x0.2A, 2x0.1A
DCDC 3x1.2A
LDO 2x0.2A, 2x0.1A
DCDC 3x1.5A
LDO 4x0.3A, 3x0.15A, 0.05A, 0.02A
DCDC 3x1.5A
LDO 4x0.3A, 3x0.15A, 0.05A, 0.02A
DCDC 1.6A, 2x0.8A
LDO 2x0.2A, 0.03A
AM335x OPP OPP100 (500MHz), OPP50 (275MHz) TURBO (720MHz), OPP120 (600MHz), OPP100(500MHz), OPP50 (275MHz) TURBO (720MHz), OPP120 (600MHz), OPP100(500MHz), OPP50 (275MHz) TURBO (720MHz), OPP120 (600MHz), OPP100(500MHz), OPP50 (275MHz) OPP100 (500MHz)
DVFS Yes Yes Yes Yes No
SmartReflex Yes Yes Yes Yes No
RTC-only mode Yes Yes Yes Yes No
DDR3 1.5 V No No No Yes Yes
Input Voltage Range 2.7 - 6.5 V 2.7 - 6.5 V 2.7 - 5.5 V 2.7 - 5.5 V 1.5 - 6.5 V
Other Features I2C I2C I2C, RTC, SLEEP mode I2C, RTC, SLEEP mode  
Package 48pin QFN
6 mm x 6 mm
48pin QFN
6 mm x 6 mm
48pin QFN
6 mm x 6 mm
48pin QFN
6 mm x 6 mm
32pin QFN
5 mm x 5 mm
TA –40°C to 105°C –40°C to 105°C –40°C to 85°C –40°C to 85°C –40°C to 85°C

Designing the Clocking Subsystem

In addition to the power subsystem, the clocking subsystem needs to be designed to provide appropriate clocks to all ICs in the system. These clocks can be created by pairing crystals with internal oscillators within the system ICs, or they can be created by a separate clock generator. See the below information on designing the clocking subsystem for your design.

Floorplanning the PCB

Before beginning schematic capture, it is recommended to floorplan the system PCB to determine the interconnect distances between the various system ICs.

Creating the Schematics

At this point in the design, it is time to start capturing the schematics. See the below collection of information to aid you in creating the schematics.

Below are Symbols, Footprints, and Simulation Models to aid in the design of the device placement and interconnects:



Laying out the PCB

After completing schematic capture, see the below information on laying out the PCB:

Board Bringup/Diagnostic

Once your custom PCB has been produced and assembled, refer to the below information on bringing-up and debugging the system.

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