AM437x General Purpose EVM HW User Guide

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AM437x General Purpose Evaluation Module (TMDXEVM437x) Hardware User Guide

Ver. 1.02


Introduction

This document describes the hardware architecture of the AM437x Evaluation Module (EVM) (Part # TMDXEVM437X) which is based on the Texas Instruments AM437x processor. This EVM is also commonly known as the AM437x General Purpose (GP) EVM.


Description

The AM437x General Purpose EVM is a standalone test, development, and evaluation module system that enables developers to write software and develop hardware around an AM437x processor subsystem. The main elements of the AM437x subsystem are already available on the base board of the EVM which gives developers the basic resources needed for most general purpose type projects that encompass the AM437x as the main processor. Furthermore, additional, "typical" type peripherals are built into the EVM such as memory, sensors, LCD, Ethernet PHY, etc. so that prospective systems can be modeled quickly without significant additional hardware resources.

The following sections give more details regarding the EVM.

System View

The System View of the AM437x GP EVM consists the main board and the camera board. See the pictures below of the EVM.

am437x_gpevm_rev1_2a_top_boardpic.JPG
Figure 1: AM437x GP EVM Top View
am437x_gpevm_rev1_2a_bottom_boardpic.JPG
Figure 2: AM437x GP EVM Bottom View

Schematics/Design/Errata Files

Be sure to view the Errata document for important notes

Functional Blocks Description

The complete AM437x General Purpose EVM is contained mostly within a single board. The GP EVM also can have a camera board (which adds a second camera module to the system) and/or wireless communication card.

AM437x GP EVM Block Diagram.JPG


Figure 3: AM437x EVM System Block Diagram

Processor

The AM437x processor is the central processor to this EVM. All the resources on the board surround the AM437x processor to provide development capabilities for hardware and software. See the AM437x datasheet and TRM for the details about the processor.

There are system configuration signals (SYSBOOT[18..0]), that can be set on the EVM using resistors and switches to define some startup parameters on the AM437x processor. See the Configuration/Setup section later for more details.

Clocks

The EVM has several clocks to support the AM437x processor. The main clock for the processor is derived from a 24MHz crystal. AM437x generates the base clock and subsequent module clocks as needed within the AM437x processor. A 32kHz clock for the RTC on the AM437x is derived from a 32.768kHz crystal on the board. An external 12MHz crystal oscillator is used to generate the source clock for the audio codec. There are resistor population options that can allow this source clock to be generated from the AM437x directly if needed.

Reset Signals

SYS_RESETn is a reset signal running to several peripherals and AM437x which performs a reset on those peripherals and the processor. SYS_RESETn is asserted by the pushbutton and is used to force a reset of the AM437x and the other peripherals. AM437x can also pulldown on the RESET_INOUTn signal to cause the SYS_RESETn line to go active. The Power on Reset to the Processor is driven from the power good signal of the Power Manager.Also a Reset Push button is provided for the Power on Reset of the board.

Memories Supported

DDR3 SDRAM

The AM437x GP EVM contains four 4 Gb (512M x 8) of DDR3L SDRAM memories from Micron. The Part number for the DDR3L SDRAM memory used is MT41K512M8RH. The package used is an 78 ball FBGA package. See the AM437x TRM for memory address locations for this memory.

NAND Flash

The GP EVM has a NAND type of flash. The part number of the memory used is MT29F4G08AB which is a 4G (512M x 8) flash memory. The GPMC signals are used to communicate with this memory.

Board Identity Memory

This board contains a serial EEPROM that contains board specific data that allows the processor to automatically detect which board is connected and the version of that board. Other hardware specific data can be stored on this memory device as well. The part number of the memory device is CAT24C256WI-G. See the Configuration/Setup section for details on the data in this memory.

SDMMC0

The SDMMC0 connector on the GP EVM is a Micro SD socket with part number SCHA5B0200. This is a standard SD/MMC Card type of connector. It is connected to the MMC0 port of the AM437x processor. Check the AM437x data sheet and TRM for supported card types/densities.

10/100/1000 Ethernet

The AM437x GP EVM has a 10/100/1000 Ethernet transceiver from Micrel(KSZ9031RN)that is connected to an RJ45 (J18) connector.

The reset on the transceiver is driven by the board system reset signal SYS_RESETn. A 25MHz crystal drives the clock input of the KSZ9031RN Ethernet PHY.

The PHY address on the MDIO bus is set to 0x00h.

USB

The AM437x GP EVM supports 2 USB ports. The USB ports are connected to a microUSB AB connector and a standard A type connector. The ESD device TPD4S012 and common choke filter ACM2012 (TDK) are used on the USB signals before they are connected to the AM437x pins. USB0 port is setup for dual role configuration and the USB1 port is setup for host mode only.

Connectivity

The AM437x GP EVM supports MCS COM8 form factor wireless boards from TI through the J20 COM connector which is a Samtec card edge type connector pn# MEC6-150-02-S-D-RA1. This connector thus supports COM8 types of boards, and more details about this connector can be found in the MCS COM8 board documents.

The COM connector requires 3.6V, 442mA on the power supply. Thus a TPS79501 LDO regulator is used to provide this voltage supply from the base 5.0V supply.

The signals on the COM board are all 1.8V voltage levels. Thus several of the I/O banks on the AM437x that connect to the COM8 connector are powered by 1.8V and voltage translators are placed for some signals to convert to/from 3.3V of the AM437x rail for a particular signal which is running at 3.3V.

UART

This EVM supports one RS232 port connector. MAX3243 RS232 transceiver is used in between UART0 signals from the processor and the standard male DB9 connector.

ADC

The Analog inputs to the AM437x are terminated on the Connector J22. This allows various analog signals to be measured from external sensors, devices, etc. The input range on these inputs is 0 to 1.8V. See the AM437x datasheet and TRM for more information on these inputs.

Dual Cameras

The two Camera Interfaces from the AM437x processor are terminated at J2 connector for a camera module and on the 12x2 header J3. The custom made Camera board from TI with part number #4P0041 shall be interfaced with the header J3. This camera module is on a separate camera board that attaches at a right angle so that the camera can face horizontally when the GP EVM is laying on a testbench. The OV2659 SOC (OmniVision) based 2MP camera module from SunnyOptics with part number #P212A is also attached directly to the connector J2. The OV2659 delivers a high-definition (HD) video and excellent low-light sensitivity for cost-sensitive applications.

Audio

The headphone output and line input signals from the two 3.5mm SJ3524 jacks are connected to the Audio codec with part number TLV320AIC3106. These are connected through the McASP1 and I2C1 interfaces of the AM437x.

Power Supplies

This section describes how the power supplies required for the design are generated.

Power Source

AM437x GP EVM uses an external AC to +5VDC (rated 2.5A min) power adapter. The slide switch SW2 is used to switch the main power to the board ON/OFF. The main power is off when the power switch is in the position away from the power supply jack. The main power is on when the power switch is in the position closest to the power supply jack.

Power Sequencing

The power sequencing requirements of the AM437X processor (see the AM437x datasheet) are handled automatically by the TPS65218 PMIC.

Power Management IC Power Supplies

The AM437x GP EVM uses the TPS65218 power management IC.

The I2C0 on AM437x is used to control the Smart Reflex port and control port on the TPS65218.

The following table provides the details on the power supplies used.

TPS65218 Power Supply AM437x Power Rail Voltage
VDCDC1(xxmA) VDD_CORE 1.1V
VDCDC2(xxmA) VDD_MPU(XXmA) 1.1V
VDCDC3(xxmA) VDDS_DDR(XXmA) 1.35V
VLS1 (XXmA) VDD_DDR (XXmA) 1.35V
V1_8D_AM437X(XXmA) VDDS_CLKOUT, VDDS_OSC , VDDS_SRAM_CORE_BG , VDDS_SRAM_MPU_BB, VDDS_PLL_CORE_LCD, VDDS_PLL_DDR , VDDS_PLL_MPU , VDDA1P8V_USB0 , VDDA1P8V_USB1, VPP , VDDA_MC_ADC , VDDA_TS_ADC, VDDS, COM8, VDDSHV9, VDDSHV11, ADC Input sections 1.8V
V1_0BAT (XXmA) CAP_VDD_RTC (XXmA) 1.0V
V1_8BAT (XXmA) VDDS_RTC (XXmA) 1.8V
V3_3D_AM438X (XXmA) VDDA_3P3V_USB0, VDDA_3P3V_USB1, VDDSHV1,2,3,4,5,6,7,8,10 (XXmA) 3.3V
V5_0D(XXmA) HDMI circuitry, USB0 power, (XXmA) 5.0V

Table 1: AM437x Power supplies from TPS65218

Note: The TPS65218 power management IC that is used on the AM437x GP EVM rev. 1.2 has several issues which can affect operation. Refer to the errata at (add link) for the TPS65218 for more details.

Other Power Supplies used

Power Supply Power Rail Voltage
V3_3D(xxmA) NAND Memory, QPSI Flash, Ethernet PHY, SDMMC0, Board ID Memory, ARM JTAG, Buffers of FTDI section,LCD Buffer, Touch screen,Camera Module,HDMI buffer,Audio Codec,RS232 sections,COM8 sections , Smart Card sections, Platform Test section, GPIO Header 3.3V
V3_3FTDI (xxmA) FT2232 Section from TPS79333 (XXmA) 3.3V
VBAT (xxmA) LCD POWER Generation , Camera Module, VCOM_BAT generation for COM8 Module, USB1 Power Generation, Platform Test section, LEDs, GPIO Header ,Buzzer 5.0V
V1_2D(xxmA) HDMI section power(XXmA) 1.2V

Table 2: Other Power supplies

APM Sense Resistors

The AM437x GP EVM has the following subsystems with current sense resistors. These resistors allow the power to be measured on each power rail to check AM437x power requirements during real time software execution. The value of the resistors is selected to provide the best dynamic range when using a TI INA226 converter. In fact an INA226 converter is installed on the EVM for both the VDD_CORE and VDD_MPU power supply rails of the AM437x. The other power rails have sense resistors, but have their measurement connections attached to 2pin standard headers so that they can be read easily by a multimeter or connected to Power Measurement Daughtercard which has an INA226.

Note the value of the sense resistors for the VDD_CORE and VDD_MPU were selected to give better dynamic range for active power modes rather than sleep/low power modes. If power is to be measured for VDD_CORE or VDD_MPU for sleep/low power modes then this sense resistor value should be changed to give better shunt voltage values.

Voltage Net Sense Resistor Value
VDD_CORE 0.05ohm
VDD_MPU 0.05ohm
VAM437X_DDR 0.05ohm
VDDS_DDR 0.05ohm
V1_8D_AM437X 0.1ohm
V3_3D_AM437X 0.1ohm

Table 3: AM437x GP EVM APM Sense Resistors

Configuration/Setup

Boot Configuration

The AM437x has SYSBOOT pins that can be configured using two 5 bit DIP switches on the EVM. These SYSBOOT switches will configure the AM437x to different boot settings. SW12 switch can be used to set the SYSBOOT[0..4] bits and SW11 switch can set the SYSBOOT[5,6,9,12,13)bits. Other SysBoot pin settings which are less likely to change from the default are done through resistors either pulled high or low. See the AM437x TRM and datasheet for the actual definitions of each of the SYSBOOT signals. Refer to the GP EVM schematic for more details.

I2C Address Assignments

In the AM437x GP EVM boards, each separate board has an I2C ID memory that contains the details of the identity of that board such as it's configuration, etc. (see sections below for more details on the memories' contents).

AM437x Function AM437x I2C Port Address
Board ID memory I2C0 0x50
PMIC Control I2C0 0x2D
Touch Screen Control I2C1 0x5C
Camera Module #0 I2C0 0xxx
Camera Module #1 I2C1 0xxx
Audio Codec I2C1 0x1B
HDMI Transmitter I2C2 0x76
HDMI Companion chip I2C2 0xxx
Multiple Smart Card slot Interface IC I2C2 0xxx

Table 4: AM437x I2C Bus Addresses

I2C ID Memory

The GP EVM has a dedicated I2C EEPROM which contains specific identity/configuration information for that board. In addition, there is available space in each memory for user specific configuration information.

The part number of the memory device is pn#CAT24C256WI-G.

Name Size (bytes) Contents
Header 4 MSB 0xEE3355AA LSB
Board Name 8 Name for board in ASCII "XXXXXXX" = AM437x GP EVM
Version 4 Hardware version code for board in ASCII "1.4A" = rev. 01.4A
Serial Number 12 Serial number of the board. This is a 12 character string which is:

WWYY4P16nnnn where: WW = 2 digit week of the year of production YY = 2 digit year of production nnnn = incrementing board number

Configuration 32 Codes to show the configuration setup on this board. For the available EVM's supported, the following codes are used: ASCII "SKU#01" = base board for gen purpose evm ASCII "SKU#02" = base board for industrial motor control evm Remaining 26 bytes are reserved
Ethernet MAC Address #0 6 MAC Address for AM437x Ethernet MAC #1
Ethernet MAC Address #1 6 MAC Address for AM437x Ethernet MAC #2 or PRU #0
Ethernet MAC Address #2 6 MAC Address for AM437x PRU #1 (if used)
Available 32702 Available space for other non-volatile codes/data

Table 5: AM437x GP EVM EEPROM Data

JTAG

The AM437x GP EVM supports embedded XDS100V2 USB Emulation through the MicroUSB AB connector. It also has an optional 20 pin TI CJTAG connector to support the Emulation. This CJTAG connector is installed by default. Other JTAG adaptors are available on TI e-store and can be purchased from here

User Interfaces

Keypad

The keypad has 6 push button switches (SW4, SW5, SW6, SW7, SW8, SW9) with Omron Part Number # B3SL-1022P on the component side of the board. This keypad uses 2 power and 3 scan lines to enable 6 buttons to be monitored.

LEDs

There are eight status LEDs ( 3 Green LEDs,1 Yellow LED, 1 Red LED, 1 Blue LED & 1 Orange LED) on the top side of the EVM. There is also a Power On indication LED D2 of GREEN colour available in the EVM.

Audio Buzzer

An Audio buzzer is installed on the board to provide auditory cues to the user. This audio buzzer PUI Audio pn# AI-1027-TWT-3V-R is driven from a GPIO.

Capacitive Touch LCD

The LCD is a 7 inch WVGA (800x480) RGB LCD panel part number #OSD070T1718-19TS. It is a 24bit RGB TFT LCD with 21 white LEDs for backlight (controlled by the TPS61081DRC power regulator). The connector used is an FPC type, 50pin connector with part number #FH12S-50S-0.5SH . The LED backlight on the LCD is controlled by a PWM controlled LED driver (TPS61081). The LCD has a Capacitive Touch screen which is connected to the I2C0 port of the Processor. The Power required for the LCD is generated using the Linear regulator supply (TPS65105).

Pin Use Description

Functional Interface Mapping

Most signals of the AM437x are connected to a fixed device on the EVM where they cannot be changed.

- Assignment list of pin functions

GPIO Definitions

See the updated pinmux documents which show use case columns for GPIO's. Developer can select and enable pins based on the selective peripheral pins as output or input.

Board Connectors

The pinout details of all the connectors used in the GP EVM are provided below.

Battery Board Connector - J1

Pin No Signal Name
1 VPWR_IN
2 VBAT
3 VPWR_IN
4 VBAT
5 PGOODBU
6 NC
7 NC
8 NC
9 DGND
10 NC
11 AM437X_AIN7
12 NC
13 BAT_HDQ
14 PMIC_AC_DET
15 DGND
16 DGND

Table 6: Battery Board connector

HEADPHONE OUT - J16

Pin No Signal Name
1 AGND_AUD
2 AUD_HPLOUT_JCK
3 AUD_HPROUT_JCK
10 NC

Table 7: Audio Out Connector

LINE IN - J14

Pin No Signal Name
1 AGND_AUD
2 AUD_LINEINL_JCK
3 AUD_LINEINR_JCK
10 NC

Table 8: Audio Line in Connector

SDMMC0 - J7

Pin No Memory Card PIN No.
1 MMC_D2
2 MMC_D3
3 MMC_CMD
4 VDD
5 MMC_CLK
6 DGND
7 MMC_D0
8 MMC_D1
9 DGND
10 MMC_CD
11 DGND
12 DGND
13 DGND
14 DGND
15 DGND
16 DGND

Table 9: SDMMC0 Connector

LCD Connector - J15

Pin No Signal Description
1 VLED+ Backlight Power +
2 VLED+ Backlight Power +
3 VLED- Backlight Power -
4 VLED- Backlight Power -
5 GND Ground
6 VLCD_VCOM Voltage
7 VLCD_DVDD Voltage
8 GND Ground
9 LCD_EN LCD Enable
10 LCD_VSYNC LCD Vertical Sync
11 LCD_HSYNC LCD Horizontal Sync
12 LCD_BLUE7 LCD Blue Data 7
13 LCD_BLUE6 LCD Blue Data 6
14 LCD_BLUE5 LCD Blue Data 5
15 LCD_BLUE4 LCD Blue Data 4
16 LCD_BLUE3 LCD Blue Data 3
17 LCD_BLUE2 LCD Blue Data 2
18 LCD_BLUE1 LCD Blue Data 1
19 LCD_BLUE0 LCD Blue Data 0
20 LCD_GREEN7 LCD Green Data 7
21 LCD_GREEN6 LCD Green Data 6
22 LCD_GREEN5 LCD Green Data 5
23 LCD_GREEN4 LCD Green Data 4
24 LCD_GREEN3 LCD Green Data 3
25 LCD_GREEN2 LCD Green Data 2
26 LCD_GREEN1 LCD Green Data 1
27 LCD_GREEN0 LCD Green Data 0
28 LCD_RED7 LCD Red Data 7
29 LCD_RED6 LCD Red Data 6
30 LCD_RED5 LCD Red Data 5
31 LCD_RED4 LCD Red Data 4
32 LCD_RED3 LCD Red Data 3
33 LCD_RED2 LCD Red Data 2
34 LCD_RED1 LCD Red Data 1
35 LCD_RED0 LCD Red Data 0
36 GND Ground
37 LCD_PCLK Clock
38 GND Ground
39 LCD_LEFTRIGHT Left Right Scan direction select
40 LCD_UPDOWN Up Down scan direction select
41 VLCD_VGH Voltage high
42 VLCD_VGL Voltage Low
43 VLCD_AVDD Voltage Analog
44 LCD_RESETn Reset
45 NC No Connect
46 VLCD_VCOM Voltage
47 LCD_DITHER Dither
48 GND Ground
49 NC No Connect
50 NC No Connect

Table 10: LCD Connector

Touch Screen Connector - J17

Pin Number Direction Description
1 NC No connect
2 NC No Connect
3 TOUCH_INTn Touch Screen Interrupt
4 GP_I2C_SDA I2C Data
5 GP_I2C_SCL I2C Clock
6 SYS_RESETn Reset
7 GND Ground
8 VCC Power

Table 11: LCD Capacitive Touch Screen Pin Details

Ethernet - J18

Pin No Signal Name Description
1 DGND Ground
2 NC No connect
3 ETHER1_D3P Data 3 +ve
4 ETHER1_D3N Data 3 -ve
5 ETHER1_D2P Data 2 +ve
6 ETHER1_D2N Data 2 -ve
7 ETHER1_D1P Data 1 +ve
8 ETHER1_D1N Data 1 -ve
9 ETHER1_D0P Data 0 +ve
10 ETHER1_D0N Data 0 -ve
11 ACT LED ANODE Anode of ACT LED
12 ACT LED CATHODE Cathode of ACT LED
13 LINK LED CATHODE Cathode of LINK LED
14 LINK LED ANODE Anode of LINK LED
SHLD1 DGND Ground
SHLD2 DGND Ground

Table 12: 10/100/1000 Ethernet Connector

USB - J11

Pin No Signal Name Description
1 VUSB_VBUS0 USB0 BUS VOLTAGE
2 USB0_CONN_DM USB0 DATA MINUS
3 USB0_CONN_DP USB0 DATA PLUS
4 USB0_ID USB0 IDENTIFICATION
5 DGND Ground

Table 13: Micro AB connector - USB 0

USB - J13

Pin No Signal Name Description
1 VUSB_VBUS1 USB1 BUS VOLTAGE
2 USB1_CONN_DM USB1 DATA MINUS
3 USB1_CONN_DP USB1 DATA PLUS
4 DGND Ground

Table 14: Type A - USB Port1

Camera Interface Headers

Camera Interface 0 - J2

Pin No Signal Name Description
1 AGND_CAM0 Analog Ground
2 SENSOR_SIO_D Sensor Serial IO Data
3 V2_8A 2.8V Supply
4 SENSOR_SIO_C Sensor Serial IO Clock
5 DGND Ground
6 SENSOR_VSYNC Sensor VSYNC
7 DGND Ground
8 SENSOR_HREF Sensor HREF
9 V1_5D 1.5V Supply
10 SENSOR_XCLK Sensor Clock
11 SENSOR_PWRDN Sensor Power Down
12 V2_8D 2.8V Supply
13 SENSOR_PCLK Sensor Clock
14 NC No Connect
15 SENSOR_RESET Sensor Reset
16 NC No Connect
17 SENSOR_Y9 Sensor Data 9
18 SENSOR_Y8 Sensor Data 8
19 SENSOR_Y7 Sensor Data 7
20 SENSOR_Y6 Sensor Data 6
21 SENSOR_Y5 Sensor Data 5
22 SENSOR_Y4 Sensor Data 4
23 SENSOR_Y3 Sensor Data 3
24 SENSOR_Y2 Sensor Data 2

Table 15: Camera Header 0

Camera Interface 1 - J3

Pin No Signal Name Description
1 VBAT VBAT
2 CAM1_VSYNC Vertical Sync
3 CAM1_DATA0 Data 0
4 CAM1_HSYNC Horizontal Sync
5 CAM1_DATA1 Data 1
6 CAM1_DATA6 Data 6
7 CAM1_DATA2 Data 2
8 CAM1_DATA7 Data 7
9 CAM1_PCLK Clock
10 CAM1_DATA8 Data 8
11 GND Ground
12 GND Ground
13 CAM1_DATA3 Data 3
14 CAM1_DATA9 Data 9
15 CAM1_DATA4 Data 4
16 CAM1_GIO0 GPIO 0
17 CAM1_DATA5 Data 5
18 CAM1_GIO1 GPIO 1
19 CAM1_WEN Write Enable
20 CAM1_FIELD Field
21 GND Ground
22 GP_I2C_SCL I2C Clock
23 CAM1_SRCCLK Clock
24 GP_I2C_SDA I2C Data

Table 16: Camera Header 1

HDMI Connector - J19

Pin No Signal Name Description
1 HDMI_TX2+ Data Transmit2 +ve
2 DAT2_S Data 2 GND
3 HDMI_TX2- Data Transmit2 -ve
4 HDMI_TX1+ Data Transmit1 +ve
5 DAT1_S Data 1 GND
6 HDMI_TX1- Data Transmit1 -ve
7 HDMI_TX0+ Data Transmit0 +ve
8 DAT0_S Data 0 GND
9 HDMI_TX0- Data Transmit0 -ve
10 CLK+ Clock +ve
11 Clock_S Clock GND
12 Clock- Clock -ve
13 HDMICONN_CEC CEC
14 NC No Connect
15 HDMICONN_I2CSCL I2C Clock
16 HDMICONN_I2CSDA I2C Data
17 GND Ground
18 V5_0HDMICONN Voltage
19 HDMICONN_HPLG HPLG

Table 17: HDMI Header

RS232 Connector - J9

Pin No Signal Name Description
1 NC No Connect
2 RS232_0RXD Receive
3 RS232_0TXD Transmit
4 NC No Connect
5 GND Ground
6 NC No Connect
7 RRS232_0RTS Request to Send
8 RS232_0CTS Clear to Send
9 NC No Connect

Table 18: RS232 connector

CAN INTERFACE

CAN INTERFACE 0 - J4

Pin No Signal Name Description
B1 NC No Connect
B2 CAN0_L Can Diff signal Low
B3 GND_CAN0 Ground
B4 NC No Connect
B5 GND_CAN0 Ground
B6 GND_CAN0 Ground
B7 CAN0_H CAN Diff signal High
B8 NC No Connect
B9 VCAN0 VCC

Table 19: CAN 0 connector

CAN INTERFACE 1 - J37

Pin No Signal Name Description
B1 NC No Connect
B2 CAN1_L Can Diff signal Low
B3 GND_CAN1 Ground
B4 NC No Connect
B5 GND_CAN1 Ground
B6 GND_CAN1 Ground
B7 CAN1_H CAN Diff signal High
B8 NC No Connect
B9 VCAN1 VCC

Table 20: CAN 1 connector

ADC Input Header - J22

Pin Number Signal Name Description
1 V1_8D 1.8V Supply
2 VBAT VBAT
3 MON_AIN0 Monitoring Analog Input 0
4 MON_AIN4 Monitoring Analog Input 4
5 MON_AIN1 Monitoring Analog Input 1
6 MON_AIN5 Monitoring Analog Input 5
7 MON_AIN2 Monitoring Analog Input 2
8 MON_AIN6 Monitoring Analog Input 6
9 MON_AIN3 Monitoring Analog Input 3
10 MON_AIN7 Monitoring Analog Input 7
11 GND_ADC Analog Ground
12 GND_ADC Analog Ground
13 AM437X_MAG_ADC0 ADC Input 0
14 AM437X_MAG_ADC4 ADC Input 4
15 AM437X_MAG_ADC1 ADC Input 1
16 AM437X_MAG_ADC5 ADC Input 5
17 AM437X_MAG_ADC2 ADC Input 2
18 AM437X_MAG_ADC6 ADC Input 6
19 AM437X_MAG_ADC3 ADC Input 3
20 AM437X_MAG_ADC7 ADC Input 7

Table 21: ADC Input Header

GPIO Header - J30

Pin Number Signal Name Description
1 V3_3D Voltage 3.3V
2 VBAT Voltage VBAT
3 GPIO0 General Purpose IO 0
4 NC No Connect
5 GPIO1 General Purpose IO 1
6 NC No Connect
7 GPIO2 General Purpose IO 2
8 NC No Connect
9 GPIO3 General Purpose IO 3
10 NC No Connect
11 GPIO4 General Purpose IO 4
12 DGND Ground
13 GPIO5 General Purpose IO 5
14 SPI1_SCLK SPI1 Clock
15 GPIO6 General Purpose IO 6
16 SPI1_D0 SPI1 DO
17 GPIO7 General Purpose IO 7
18 SPI1_D1 SPI1 D1
19 GPIO8 General Purpose IO 8
20 SPI1_CS0 SPI1 Chip Select
21 GPIO9 General Purpose IO 9
22 GPIO18 General Purpose IO 18
23 GPIO10 General Purpose IO 10
24 GP_I2C_SCL I2C CLK
25 GPIO11 General Purpose IO 11
26 GP_I2C_SDA I2C Data
27 GPIO12 General Purpose IO 12
28 GPIO19 General Purpose IO 19
29 GPIO13 General Purpose IO 13
30 GPIO20 General Purpose IO 20
31 GPIO14 General Purpose IO 14
32 GPIO21 General Purpose IO 21
33 GPIO15 General Purpose IO 15
34 GPIO22 General Purpose IO 22
35 GPIO16 General Purpose IO 16
36 GPIO23 General Purpose IO 23
37 GPIO17 General Purpose IO 17
38 GPIO24 General Purpose IO 24
39 DGND Ground
40 DGND Ground

Table 22: GPIO Header

I2C - Header - J6

Pin No Signal Name Description
1 PWRMON_I2CSCL I2C Clock
2 PWRMON_I2CSDA I2C Data
3 DGND Ground
4 PM_ALERT Alert
5 NC No Connect

Table 23: I2C Header

Appendix A: PCB Guideline Deviations

PCB Guidelines deviation with respect to datasheet is provided below.

S.No PCB Design Guidelines Datasheet Reference Deviation Reason For deviation
1 BGA pad size - 0.5mm typ Table 5-35 recommended pad size typical value is 0.5mm , implemented as 0.279mm Should be 0.279 mm as this is the feasible value for the package
2 VDDS_DDR bulk bypass capacitor count 2 Devices Table 5-37 Only one bulk capacitor used Due to Space constraints
3 VDDS_DDR bulk bypass total capacitance 20 μF Table 5-37 2 x 10 uF capacitors required. But only one 10 uF used Due to Space constraints
4 DDR3 bulk bypass capacitor count 2 Devices Table 5-37 One 22uF used Due to Space constraints
5 DDR3 bulk bypass total capacitance 20 μF Table 5-37 One 22uF used Due to Space constraints
6 VDDS_DDR HS bypass capacitor count 20 Devices Table 5-38 only 7 devices used Due to Space constraints
7 VDDS_DDR HS bypass capacitor total capacitance 1 μF Table 5-38 0.01 x 7 devices used Due to Space constraints
8 DDR3 device HS bypass capacitor total capacitance - 0.85 μF Table 5-38 0.01 x 13 devices used Due to Space constraints
9 DQS[x]-to-DQ[x] skew of 25 mils Table 5-42 40 mils diff in byte 2, 43 mils in byte 3, 45 mils in byte 3 Guideline changed to match with the propagation delay and not length matching
10 CK and ADDR_CTRL nominal trace length - 100 mils difference Table 5-41 more than 100 mils Guideline changed to match with the propagation delay and not length matching
11 Split plane crossing 5.6.2.1.3.3 Not followed Due to Space constraints

Table 24: PCB Guidelines Deviations

EVM Important Notices

NoteNote: The Standard Terms And Conditions for TI Evaluation Modules can be downloaded from here:http://www.ti.com/lit/pdf/sszz027

ANNEX

This HUG is prepared by using the following documents as references.

  1. AM437x Sitara ARM Microprocessors TRM (SPRUHxx)