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BT Audio Testing on Wilink8

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THIS PAGE IS UNDER CONSTRUCTION.


Introduction

The following sections describe how to perform basic audio tests with a PC and the required HDMB and HDK platforms, which include the Wolfson WM8750L CODEC on-board.

The following scripts are run on HCITester, which is part of the TI Wireless Tools package. Please see the HCITester User Guide to properly configure the software, and the INIT script document for instructions on how to run the INIT script.

The examples below can be downloaded here, for direct use with HCITester.


PCM Loopback

This example will take PCM audio input on the HDMB "Line In" jack, and output that same audio on the HDMB "Stereo Out" jack.

The full script can be downloaded here.

The requirements for this example are:
1. PC running HCITester

2. WL18XX HDMB board w/ on-board WL8750L CODEC
NOTE: The HDMB board must be modified in order to configure the CODEC. Please install a 0-ohm 0402 resistor on pads R135. This will connect the I2C SDA line from the CODEC to the 80 pin connector.

3. WL18XX HDK
NOTE: The HDK board must be modified in order to configure the CODEC.

4. Input sound via auxiliary cord to "Line In" (i.e. phone audio jack)

5. Output sound via auxiliary cord to "Stereo Out" (i.e. headphones, speaker, etc.)

Step 1:

 Run the INIT script.

Step 2:
Configure the Wilink device's PCM parameters as such:

  • PCM clock rate: 3072
  • PCM direction: Master
  • Frame sync frequency: 48000 Hz
  • Frame sync edge: (1) Falling edge
  • Frame sync polarity: (0x00) Active High
  • CH1 data out size: 16 bits
  • CH1 data out offset: (0x0001) 1 frame
  • CH1 out_edge: (1) Falling edge
  • CH1 data in size: 16 bits
  • CH1 data in offset: (0x0001) 1 frame
  • CH1 in_edge: (0) Rising Edge
  • CH2 data out size: 16 bits
  • CH2 data out offset: 17 frames
  • CH2 out_edge: (1) Falling edge
  • CH2 data in size: 16 bits
  • CH2 data in offset: 17 frames
  • CH2 in_edge: (0) Rising Edge

(Enhanced)

  • Change CH1/CH2 Dout mode to "always output"

With the following commands:

Send_HCI_VS_Write_CODEC_Config 0xFD06, 3072, 0x00, FSync, 0x0001, 1, 0x00, 0x00, 16, 0x0001, 1, 16, 0x0001, 0, 0x00, 16, 17, 0x01, 16, 17, 0x00, 0x00
Send_HCI_VS_Write_CODEC_Config_Enhanced 0xFD07, 0x00, 0x0000, 0x0000, 0x00, 0x04, 0x04, 0x01, 0x00, 0x000000, 0x00, 0x00, 0x04, 0x04, 0x01, 0x00, 0x000000, 0x00, 0x00

Step 3:
MUX the Wilink I2C Bus for codec configuration using the following commands:

#select bt_func6 on bt_func6
Send_HCI_VS_Read_Modify_Write_Hardware_Register 0xFD09, 0x200ce122, 0x0000, 0x001f
Wait_HCI_Command_Complete_VS_Read_Modify_Write_Hardware_Register_Event 5000, any, HCI_VS_Read_Modify_Write_Hardware_Register, 0x00
#select bt_func7 on bt_func7
Send_HCI_VS_Read_Modify_Write_Hardware_Register 0xFD09, 0x200ce124, 0x0000, 0x001f
Wait_HCI_Command_Complete_VS_Read_Modify_Write_Hardware_Register_Event 5000, any, HCI_VS_Read_Modify_Write_Hardware_Register, 0x00

# btfanc 6 --> sda &  btfanc 7 --> scl
Send_HCI_VS_Write_Hardware_Register 0xFF01, 0x200Ef516, 0x6600
Wait_HCI_Command_Complete_VS_Write_Hardware_Register_Event 5000, any, HCI_VS_Write_Hardware_Register, 0x00

Step 4:
Configure the WM8750 CODEC with the following commands:

# reset codec
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x1e, 0x01, "00"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00
      
# set device power management 
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x32, 0x01, "FE"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# Enable All Analog inputs and outputs
# DACL =  (bit8) 
# DACR =  (bit7) 
# Lout1 = (bit6)
# Rout1 = (bit5)
# Lout2 = (bit4)
# Rout2 = (bit3)
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x35, 0x01, "FE"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# set left line input (codec address = 0x00) vol = default, un-mute , bit 8 - update now (LIVU)
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x01, 0x01, "17"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# set right line input (address = 0x02) vol = default, un-mute , update now (RIVU)
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x03, 0x01, "17"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# digital path - unmute the DAC (bit4=0)
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x0a, 0x01, "00"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

#set codec left input to input2 , LINSEL=01 (bits 7:6)- sutable for 18xx HDMB and ORCA/TRIO MB
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x40, 0x01, "40"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

#set codec right input to input2 , RINSEL=01 (bits 7:6)- sutable for 18xx HDMB and ORCA/TRIO MB
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x42, 0x01, "40"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

#set left ADC to output (enable left dac to left mixer), left mixer volume set, bits 6:4, set to 0x1
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x45, 0x01, "50"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

#set right ADC to output (enable right dac to right mixer)   
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x4b, 0x01, "50"
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# Digital Interface Activation-clocking & sample rate 8k-0x0c  48k-0x00 96k-0x1c   16k - 0x14
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x10, 0x01, codec_Fsync
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

# PCM, MSB on 2nd bit, codec master=43   *
# PCM, MSB on 2nd bit, codec slave=03    *
# PCM, MSB on 1nd bit, codec master=53   
# PCM, MSB on 1nd bit, codec slave=13    
# I2S, MSB on 2nd clock, codec master=42 *
# I2S, MSB on 2nd clock, codec slave=02  *
Send_HCI_VS_Write_I2C_Register_Enhanced 0xFD36, 0x1a, 0, 100, 0x01, 0x0E, 0x01, codec_config
Wait_HCI_Command_Complete_VS_Write_I2C_Register_Enhanced_Event 5000, any, HCI_VS_Write_I2C_Register_Enhanced, 0x00

Step 4:
Enable PCM Loopback mode using the following commands:

Send_HCI_VS_Set_Pcm_Loopback_Enable 0xFE28, loopback_enable
Wait_HCI_Command_Complete_VS_Set_Pcm_Loopback_Enable_Event 5000, any, HCI_VS_Set_Pcm_Loopback_Enable, 0x00

You should now be able to hear the audio (on Stereo Out) that you are playing (on Line in).

NOTE: You can reset the I2C settings and disable PCM loopback with the following commands:

Send_HCI_VS_Read_Modify_Write_Hardware_Register 0xFD09, 0x200ce122, I2C_BTFUNC6_18xx, 0xffff
Wait_HCI_Command_Complete_VS_Read_Modify_Write_Hardware_Register_Event 5000, any, HCI_VS_Read_Modify_Write_Hardware_Register, 0x00

#restore bt_func7 top func
Send_HCI_VS_Read_Modify_Write_Hardware_Register 0xFD09, 0x200ce124, I2C_BTFUNC7_18xx, 0xffff
Wait_HCI_Command_Complete_VS_Read_Modify_Write_Hardware_Register_Event 5000, any, HCI_VS_Read_Modify_Write_Hardware_Register, 0x00
Send_HCI_VS_Set_Pcm_Loopback_Enable 0xFE28, 0
Wait_HCI_Command_Complete_VS_Set_Pcm_Loopback_Enable_Event 5000, any, HCI_VS_Set_Pcm_Loopback_Enable, 0x00


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