C2000 Concerto Interrupts

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C28 Interrupts

See: http://processors.wiki.ti.com/index.php/Interrupt_FAQ_for_C2000

Cortex - M3 Interrupts

Handling Interrupts via Software

In the M3 command linker file, the .intvecs section is mapped to Flash (this is a static vector table in Flash) and the .vtable section is mapped to RAM (dynamic vector table – where ISR’s can be dynamically changed via IntRegister() function).

There’s 2 ways of handling interrupts in flash (the dynamic method is preferred).


Dynamic case:

In this case,
.intvecs is where g_pfnVectors (vector table in Flash) is stored (mapped in startup_ccs.c).
.vtable is where g_pfnRAMVectors (vector table copy in RAM should be aligned here) is stored (mapped in interrupt.c).

In your code:

  1. To enable interrupts to the CPU, call IntMasterEnable();
  2. To enable interrupts, call IntEnable(INT_TIMER0A);, where the parameter is the interrupt in question.
  3. Then, to register your ISR, you call “IntRegister(INT_TIMER0A, Timer0IntHandler);” where the first parameter is the interrupt in question, and the 2nd parameter is the pointer to the function being called.

The IntRegister() function:

  1. Copies g_pfnVectors from flash to g_pfnRAMVectors in RAM (address aligned with 0x1000).
  2. Sets NVIC_VTABLE to g_pfnRAMVectors.
  3. Changes vector table address for INT_TIMER0A to point to Timer0IntHandle

Then when an interrupt occurs, the M3 looks to g_pfnRAMVectors for the correct handler location.

Static case:
.vtable does not matter in this case.
.intvecs is where g_pfnVectors (vector table in Flash) is stored (mapped in startup_ccs.c).

In your code:

  1. To enable interrupts to the CPU, call IntMasterEnable();
  2. To enable interrupts, call IntEnable(INT_TIMER0A);, where the parameter is the interrupt in question.
  3. Manually set NVIC_VTABLE = beginning of .intvecs section (address aligned with 0x1000)
    1. In startup_ccs.c: Ing_pfnVectors  – fill the appropriate vector with the desired interrupt handler name for the interrupt handler you plan to use.

void (* const g_pfnVectors[])(void) =
{
    (void (*)(void))((unsigned long)&__STACK_TOP), // The initial stack pointer
    ResetISR, // The reset handler
    NmiSR, // The NMI handler
    ...
    Timer0IntHandler, // !!!Timer 0 subtimer filled instead of IntDefaultHandler!!!
    ...
}
 


Then when an interrupt occurs, the M3 looks to g_pfnVectors for the correct handler location.