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C5000 Chip Support Library

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C5000 Chip Support Library

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  • The C55x Chip Support Libraries (CSL) provide an application programming interface (API) used for configuring and controlling the DSP on-chip peripherals for ease of use, compatibility between various C55x devices and hardware abstraction. CSLs will shorten development time by providing standardization and portability.
  • C55x CSL - Low Power: The functions listed in the features section are specifically designed for TMS320C55x Low Power DSPs including C5504, C5505, C5514, and C5515 devices.
  • C55x CSL (SPRC133): The functions listed in the features section are specifically designed for TMS320C55x DSPs including C5501, C5502, C5509, C5509A, and C5510, C5510A.

Download

  • To download the chip support library for C5000 devices, click here

Documentation

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CSL version 3.00.00 and newer include the latest documentation with the software package. This documentation should be used in place of the SPRU433 API reference guide.

Frequently Asked Questions

Q: Is there a CSL GUI?

  • A: The SPRU511 "TMS320C55x CSL USB Programmer's Reference Guide" describes the use of the CSL USB GUI. This is no longer supported or available.

Q: Where is the USB audio class example in version 2.50.00?

Q: Are there any updates to the CSL API reference guide? (SPRU433)

  • A: No, as of CSL version 2.50.00 and newer, the documentation is included with the product. This documentation is generated from the code, and will be the most up to date.

Q: How can I change the code on CSL_USB_IntExample to send data via pipe 0x01 instead of 0x02 (internal bootloader uses 0x01) so I can boot from USB?

Q: Trouble with the USB comm port example with the 5515 EZDSP

A: TMDX5515EZDSP, CSL_USB_CdcExample_Out - can't open COM port

Q: Where do I specify to the CSL which chip I have?

  • A: Please look in the csl_general.h file and make sure to select the proper device.

Q: Are the drivers WHQL Certified?

  • A: No, the drivers are not WHQL certified.
  • A: With the exception of CDC where we provide an INF file so that you may customize the VID/PID, we use the standard, built-in operating system drivers for items such as USB mass storage, CDC, etc. End users of the product would need to submit their product and their customized drivers to Microsoft for certification.

Q: Did the CSL USB libraries pass all the USB chapter 9 tests?

  • A: The USB MSC passed the USB chapter 9 and MSC tests in the USB Command Verification Program.

Q: Does the CSL include USB Mass Storage Class?

  • A: Yes.

Q: Is FAT32 supported?

  • A: Yes, as part of the atafs module in CSL 2.50 and newer.

Q: What kind of performance should I expect using the ATAFS?

  • A: Performance will vary with the SD card chosen. The performance is more a function of the access time of the SD card and not the throughput. For example, a Class 4 card may have a faster access time than a Class 10 card. This depends heavily on the firmware (and thus brand) of the SD card manufacturer.
  • A: For a 100Mhz CPU, with 50mhz SD clock, with class 4 and class 4 cards, we typically see performance in the 3 to 5Mbps range (CSL version 2.50). This compares to raw card read/write performance with the same configuration of 40Mbps.
  • A: What is limiting performance is the "safe" writing mode that the ATAFS software (CSL version 2.50). This means that for every cluster written to the SD card, the FAT table is updated. This is why access time is a key determinant of performance.
  • A: To improve performance, consider using raw read/write modes. You may also want to look at modifying the FAT updates to cache the writes to improve performance. In doing such changes, it may be possible to achieve 10Mbps.
  • A: This is logged as TI internal enhancement request for CSL #839.

Q: Why is ATA Write faster than ATA Read?

  • A: The ATA_write() is using 4 512-byte write buffers. It can accumulate up to the 2KB for one write. Since the cluster size for the SD card is 4KB, it only makes ¼ SD write operation. The ATA_read() on the other hand is not doing the read-ahead operation, so each SD read is only read 512 byte. If the read unit is 512-byte, then the write and read is about the same speed.
    • Here are several potential improvements that may be considered:
      • 1. Increase the write buffer to 8 512-byte, because the minimum FAT cluster size is 4KB. It should increase the write speed by 100% (from 5Mbps to 10Mbps).
      • 2. Add the 4-KB read-ahead buffer. We should be able to get the same performance (10Mbps) for reading
      • 3. Currently the read and write is both using BYTE as the basic unit. It is very inefficient for write block data. If we know the application can always use block data (multiple of 512 byte) , then we can implement the a ATA_blk_read() and ATA_blk_write(). It is possible to reach higher throughput that way.
  • A: This is logged as TI internal enhancement request for CSL #839.

Q: Does the CSL include bad block management or load levelling for flash memory?

  • A: No, the 55x devices have ECC error detection for MMC/SD and NAND flash. The bad block management or load levelling needs to be done at either NAND flash or MMC/SD card.

Q: Does the CSL support USB HID?

  • A: the CSL does not contain HID support, but there is USB HID support included with the C5000 Connected Audio Framework
  • A: This is logged as TI internal enhancement request for CSL #1029.

Q: Does the CSL support 5532/3/4/5?

  • A: As of version 2.50 the CSL has not been updated to include defined support for the 5532/3/4/5.
  • A: CSL version 2.50 can be used with 5532/3/4/5 by using the 5515 CSL without the EMIF support.

Q: The CSL and user guide register names for clock configuration and clock generator registers don't match

  • A: CSL 2.50 and SPRUFX5A - System User's Guide use different register names for clock configuration and clock generator regs.
  • A: Mapping is:
Register Address    CSL Name    SPRUFX5A Name
----------------    --------    -------------
1C1Eh            SDRAMCCR    CCR1
1C1Fh            CCR2        CCR2
1C20h            CGCR1        CGCR1
1C21h            CGICR        CGCR2
1C22h            CGCR2        CGCR3
1C23h            CGOCR        CGCR4

Q: Are Video Class drivers supported?

  • A: Not at this time. This is internal enhancement request #1830

Q: Do I need to get my own USB VID and PID?

Q: Can I use the TI VID and get a unique PID from TI? / Can I get a PID from TI?

Q: What PID doe you use on the 5505?

  • A: The PID we use for C5505 is 0x9010.

Q: How do I change the product display name?

  • A: Change the manufacturer and Product Description strings in the INF driver files.

Q: What VID/PID does TI use for the bootloader?

  • A: Some 55x bootloaders can support booting from USB. In that case, the VID=0x0451 and PID=0x9010 which is fixed in the bootloader.

Q: How many endpoints does the USB core driver support?

  • The USB core on the 55x can support endpoint 0 and has 4 endpoints, each capable of TX AND RX simulatneously.
  • The CSL USB core driver as of May 23, 2012, can only support 4 endpoints in EITHER TX or RX in addition to endpoint 0.
  • This is filed as internal bugzilla enhancment request 1989.

Q: Where is the project to rebuild the CSL?

  • A: After downloading and installing the CSL from download link above...
  • For CCS4.x, open the project in ccs_v4.0_examples\cslVC5505. After rebuilding, the library file is in ccs_v4.0_examples\cslVC5505\Debug\cslVC5505.lib
  • For CCS3.3, open the project in build\cslVC5505.pjt. After rebuilding, the library file is in build\Debug\cslVC5505_Lib.lib
  • In either case, the library file in build\cslVC5505.lib is not automatically updated.

Q: What do the USBposttransaction and USB_dmaRX and USB_dmaTX functions do?

  • A: The USBposttransaction defines how data will be transferred to/from the USB. When the instance is initialized, you can choose to do cpu polling or dma transfer.
  • The USB_dmaRX and USB_dmaTX are called inside that function in case you want to use the dma to transfer data and indicate the direction of transfer.

Q: Is linked list for descriptor concatenation (which is in C5509A CSL) still supported in current CSL?

  • A: Yes and no. There is still a linked list for descriptors in the current CSL, but it is different from the C5509A CSL because the devices use different IP (full speed only vs 2.0).
  • The overall function is still there, though.

Troubleshooting

  1. Please check if you have the latest version of the CSL. The latest version will be available from the download link on this page.
  2. Please check whether you have selected the right device from the CSL. Please look in the csl_general.h file and make sure you have selected the proper device.

Related