C6000 Optimizing C/C++ Compiler Errata

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Options Errata

--ppm
The Compiler User's Guide is missing information on the -ppm switch, used to generate a list of predefined and user defined macros. The details are:
-ppm[=filename]
Generate a list of predefined and user defined macros for the source file into the file <filename>.pp and then exit. Optionally, name the output file. The output will include only those files directly included by the source file. Also see the -ppa option to continue compilation after generating the macro list (similar to gcc).
This option became available starting with version 6.1.0.
--no_const_clink
The Compiler User's Guide is missing information about the --no_const_clink switch. This switch prevents the compiler from generating .clink directives (conditional linking) for const global arrays. By default, these arrays are placed in a .const subsection and conditionally linked.

Section 6.1 wchar_t Description

The User's Guide includes this incorrect statement:

"The run-time library has minimal support for wide and multi-byte characters. The type wchar_t is implemented as int."

This should read as:

"The run-time library has minimal support for wide and multi-byte characters. The type wchar_t is implemented as unsigned short."

Section 6.2 Characterics of TMS320C6000 C++

The exceptions to the standard list includes these bullets that are incorrect and not applicable to the current compiler toolset:

These are no longer missing from standard C++ support.

Section 7.5.1 Using Assembly Language Modules With C/C++ Code

NOTE: C6600 Stack Alignment

The C6600 does introduce the 128-bit container type __x128_t as described in the note on page 203 of the C6000 Optimizing Compiler User's Guide (spru187t.pdf). However, the compiler does not enforce 16-byte stack alignment for code compiled for C6600.

The NOTE should be entitled Alignment of __x128_t Type Data Objects (C6600). The pertinent information is as follows:

For the C6400/C6400+/C6740/C6600 ISAs, the compiler will always align the stack to an 8-byte boundary.

Section 7.5.4 Using Intrinsics to Access Assembly Language Statements

Table 7-4. TMS320C6400+ and C6740 C/C++ Compiler Intrinsics

The _dmv() intrinsic description should read: "Places src1 in the 32 MSBs of the long long and src2 in the 32 LSBs of the long long. See also _itoll.

The intrinsic shru2 lacks an underscore. It should read: "unsigned _shru2 (unsigned src1, unsigned src2);"

The _shr2 and _shru2 description should read: "For each 16-bit quantity in src1, the quantity is arithmetically or logically shifted right by src2 number of bits. src1 can contain signed or unsigned values"

Table 7-6. TMS320C67000 C/C++ Intrinsics

The documentation should note that these intrinsics are also available for C6740 devices.

Section 7.5.8.5

This section should be numbered 7.5.9.

Section 7.5.8.6

The "STORE_AMR" in the second element of the list should read "RESTORE_AMR". This section should be numbered 7.5.10.

Section 7.5.11 Floating Point Control Register Side Effects (New)

When performing floating point operations on a floating-point architecture, status bits in certain control registers may be set. In particular, status bits may be set in the FADCR, FAUCR, and FMCR registers, hereafter referred to as the "floating point control registers". These bits can be set and cleared from C/C++ code by writing to or reading from these registers, as shown in example 6-1. In compiler versions released after July of 2009, the compiler uses the following steps for generating code that accesses any of the floating point control registers.

  1. The floating point control registers become undefined by a function call or a function return. The means the data in the floating point control registers is valid and can be read in C/C++ code until a function call or a function returns.
  2. If the code in a function accesses any of the floating point control registers, the compiler assumes that those registers are live across the function, which means that floating point instructions that may set bits in those floating point control registers cannot be speculatively executed.
  3. If an interrupt service routine modifies any of the bits in a floating point control register, the interrupt service routine should be written to save and restore that floating point control register.

Section 7.6.3

The following paragraph should be added to the end of the section.

For floating point architectures, you are responsible for handling the floating point control registers FADCR, FAUCR and FMCR. If you are reading bits out of the floating pointer control registers, and if the interrupt service routine (or any called function) performs floating point operations, then the relevant floating point control registers should be saved and restored. No macros are provided for these registers, as simple assignment to and from an unsigned int temporary will suffice.

Section 8.2 The C I/O Functions

format.h and the format conversion buffer

The internal routine behind the C I/O functions (such as printf, vsnprintf, snprintf) is _printfi. It will reserve 400 bytes of stack space for a format conversion buffer. This leads to 2 questions:

The buffer size is set by the macro FORMAT_CONVERSION_BUFFER in format.h. These items need to be considered before changing the size to a smaller number.

Also note, the ANSI standard states the conversion buffer should be 4K.

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