C674x/OMAPL1x Introductory Information
From Texas Instruments Embedded Processors Wiki
What is C674x/OMAPL1x?
- Pin for Pin compatible set of devices for design flexibility
- OMAP-L138, C6748, C6746, C6742, pin for pin compatible
- OMAP-L137, C6747, C6743, pin for pin compatible (BGA package only)
- C6745, C6743 pin for pin compatible (QFP package only)
- Portability to applications requiring high dynamic range and precision
- 11mW to 470mW for typical use case scenarios
- Significantly reduced power consumption compared to previous floating point platforms
- >65% Reduction in Total Power
- 20X lower standby power
- IEEE Single Precision/32-Bit and IEEE Double Precision/64-Bit Floating Point formats
- Upto 30% reduction in system cost due to high integration
- Connectivity: 10/100 EMAC, USB 2.0/1.1, UART, Universal Parallel Port (uPP)
- Storage: USB, MMC-SD, NAND, SATA
- Video/Display: Video Port Interface (VPIF), LCD controller
- Memory Support: mDDR, DDR2, SDRAM
- Up to 512Kbyte RAM reduces dependency on external RAM
- 674x Core brings best of fixed point 64x+ and floating point 67x+ worlds
- Low pricing starting at less than $6.70 @ 1Ku quantities
- ARM+DSP removes need for system microcontroller
- Enable new markets with differentiated peripherals
- Three Enhanced Pulse Width Modulators (eHRPWM)
- Three 32-Bit Enhanced Capture Modules (eCAP)
- Two 32-Bit Enhanced Quadrature Encoder
What is the difference between OMAP-L13x and C674x?
- C674x is a DSP-only part. C674x has TI's next generation unified core C674x that takes advantage of all the enhanced features of the fixed point C64x+ core, and that of the C67x+ floating point core.
- OMAP-L13x is a DSP + ARM part. The DSP part of OMAP-L13x is C674x.
What are the key features for C674x/OMAPL1x?
High Connectivity, Sweet Spot of Low Power, High Performance, Low Cost
TI’s Next Gen DSP Core
- 674x Features assisting in reducing time to market and ease of development
- Binary compatibility allows usage of SW available for both 64x+ and 67x+ platforms. Ensures reuse of legacy SW developed on prior C6x cores
- Native support for IEEE 754 Single Precision and Double Precision floating point instructions
- Easy code porting from PC based development environments to 674x based embedded environment
- No additions effort required to modify the floating point algorithm code to fixed point
- Cache coherence feature for the internal memory eliminates the need to add explicit synchronization code to the system SW.
- Support for Privileged mode program execution.
- Support for exceptions helps debug complex system issues.
- The internal DMA (IDMA) controller allows rapid data transfers between all local memories.
- Support for non-aligned 32-bit (word) and 64-bit (double word) memory accesses eases array handling.
- 674x Features assisting in maximizing device performance
- Support for Mixed precision instructions allow high quality and high performance audio algorithms
- Advanced fixed point instruction set allowing maximum performance for performance critical fixed pointy code.
- Fixed Point Multiply Supports Two 32 × 32-Bit Multiplies, Four 16 × 16-bit Multiplies, or Eight 8 × 8-Bit Multiplies per Clock Cycle, and Complex Multiples.
- Additional instructions to support complex multiplies allowing up to eight 16-bit multiply/add/subtracts per clock cycle
- Flexible memory architecture for L1 memory. The L1 memory can be configured as cache for flexibility and ease of development and also as RAM for more control and improved performance
- 674x Features assisting reducing code size
- The software pipeline loop (SPLOOP) facility provides a more efficient way of writing highly optimized loops. The H/W implemented S/W pipelining has many advantages
- Since the prolog and epilog do not need to be explicitly code, code size is significantly reduced.
- The SPLOOP implementation allows the kernel to be interrupted and thus allow low interrupt latency.
- Support for 16-bit compact instructions that can replace their 32-bit equivalents help reduce code size with no impact on functionality or speed.
- The software pipeline loop (SPLOOP) facility provides a more efficient way of writing highly optimized loops. The H/W implemented S/W pipelining has many advantages
Low Power
- Portability for traditionally wired applications through low power and rich connectivity peripherals
- Up to 20x lower standby power and 1/3 the power consumption of existing floating-point devices
- Power consumption ranging from 11 mW deep sleep mode power to 470 mW total power in active mode
- Power management software for ARM Linux and DSP BIOS to support dynamic voltage and frequency scaling (DVFS)
- Dual voltage LVCMOS 3.3V/1.8V I/Os
High Integration
- Significant reduction in system cost due to high integration
- Enable new markets with differentiated peripheral
When should I consider C674x/OMAPL1x?
- If you need your products to be battery operated
- If you need connectivity - Network (wired or Wireless) or USB, SATA
- If you need a real time Operating system
- If you need data connection to FPGA or high speed ADC/DAC (uPP)
- If you have C6000 floating- or fixed- point code that you want to reuse
- If you need a LCD display up to 1024x720
- If you need a lot of SRAM
- If you need floating point for dynamic range and high precision
- If you need to port your PC/Matlab based algorithm quickly to embedded platform
- If you need to reduce your system BOM cost by moving to an integrated solution
What is the block diagram of the device?
C6747 Functional Block Diagram
C6745 Functional Block Diagram
C6743 Functional Block Diagram
OMAPL137 Functional Block Diagram
C6748 Functional Block Diagram
C6746 Functional Block Diagram
C6742 Functional Block Diagram
OMAPL138 Functional Block Diagram
What applications are these devices targeted for?
Few Key Applications enabled by OMAPL137 and C674x
 Programmable Automation Control |
 Oscilloscope |
 Test and Measurement Systems |
 Networked AVRs |
Other Application Examples
Magnetic Resonance Imaging (MRI)
MP3 Player/Recorder (Portable Audio)
GPS: Personal Navigation Device
What is the advantage of using C674x/OMAPL1x for some of the mentioned applications?
- Cost Advantage
- High level of integraton significantly reduces system BOM
- See below cost savings for few applications
 BEFORE |
 AFTER |
 BEFORE and AFTER |
 BEFORE |
 AFTER |
 BEFORE and AFTER |
- Time to Market Advantage
- Binary compatibility allows access to SW written for all 6x cores. Significantly increases SW options
- Ready to use Peripheral drivers, system SW components such as DSPLINK, NDK, Codec Engine and standardized APIs such as IUNIVERSAL help significantly reduce development time
- Support for native floating point formats allows easy integration with PC based development environments.
- Performance Advantage
- Advanced Fixed Point instructions to help achieve maximum performance for fixed point arithmetic
- Available IQMath Library code allows optimal execution of code requiring better control on Q point. Most suitable for 64x+ architecture
- Native support for Floating Point (Single Precision and Double Precision( and support for Mixed Precision instructions help get maximum performance for code that requires high dynamic range and precision of floating point arithmetic.
What peripherals are available with C674x/OMAPL1x?
See below some of the key peripherals available with C674x/OMAPL1x and what value they bring to the applications using these processors
- EMAC – Ethernet Media Access Controller
Benefit: The EMAC module provides an efficient interface between the DSP core processor and the networked community. The EMAC supports both 10Base-T (10 Mbits/sec) and 100BaseTX (100 Mbits/sec), in either half or full duplex, with hardware flow control and quality-of-service (QoS) support.
- SATA
Benefit: The built-in serial ATA controller complies with the AHCI 1.1 standard and is used to connect to Hard Disk Drives as well as ATAPI devices (CD etc) at a line speed rate of 1.5 and 3.0 GBits/Sec.
- USB 2.0
Benefit: OTG controller makes connecting devices be it host (e.g. downloading data from another USB host) or target (e.g. Thumb Drive, HDD, Printer, etc) faster and easier at speeds supported by USB2.0 standard.
- USB 1.1 Host
Benefit: OHCI controller makes connecting to devices/targets (e.g. Thumb Drive, HDD, Printer, etc) faster and easier up to a maximum speed of 12 Mbits/Sec.
- MMC/SD
Benefit: Multimedia cards (MMC) and Secure Digital (SD) cards are used in a number of end equipment markets to add cheap storage capabilities
- Liquid Crystal Display Controller (LCDC)
Benefit: The liquid crystal display controller (LCDC) is used to interface to character display panels for text message display or to graphical display panels for image/video display. Easily extend application to include visual capabilities
- Video Port Interface (VPIF)
Benefit: The VPIF module provides an interface to output or capture video streams (8-bit, YCbCr, 4:2:2) in BT.656 or BT.1120 format. A raw CCD/CMOS capture mode is also supported to receive 8-bit or 10-bit image data deliminated by dedicated Vertical Valid and Horizontal Valid sync signals. The maximum pixel clock rate is TBD.
- Universal Parallel Port (uPP)
Benefit: The uPP module performs parallel data transfer using two independent channels at speeds up to 75 MHz. The peripheral includes an internal DMA controller to minimize CPU and/or EDMA overhead. The uPP protocol is designed to interface simply with high speed digital-to-analog converters (DACs) or analog-to-digital converters (ADCs), and it can also be used for high-speed data transfer to or from an FPGA or uPP-equipped DSP. Clock speed, signal polarity, and transfer size are all configurable on a per-channel basis.
- Programmable Realtime Unit (PRU)
Programmable Realtime Unit Subsystem Guide
Benefit: The PRU subsystem contains two independent 32-bit RISC processors for offloading tasks from the ARM and DSP. The subsystem excels at manipulating packed memory mapped data structures and implementing system features that have tight real time constraints. It can be used to extend peripheral capability such as implementing additional UARTs or CAN interfaces, reduce power by running with the ARM and DSP shut down, and accelerate system performance by offloading tasks from the other cores.
- Enhanced Quadrature Encoder Pulse Module (eQEP)
Benefit: The Quadrature Encoder Pulse (QEP) peripheral is used for direct interface with a linear or rotary incremental encoder to get position, direction & speed information from a rotating machine for use in high performance motion & position control system.
- Enhanced High Resolution Pulse Width Modulators (eHRPWM)
Benefit: The Enhanced High Resolution Pulse Width Modulators (eHRPWM) can effectively generating complex pulse width waveforms with minimal CPU overhead or intervention.
- Enhanced Capture Module (eCAP)
Benefit: The Enhanced Capture Module (ECAP) is essential in systems where accurate timing of external events is important.
- EDMA 3.0 & SCR–3-Component Architecture
Benefit: Enhanced DMA engine for efficient movement of data between memory and peripherals. Switch Central Resource for high speed, concurrent interconnect
- McASP – Multichannel Audio Serial Port
Benefit: The McASP functions as a general-purpose audio serial port optimized for the needs of multichannel audio applications including time-division multiplexed (TDM) stream, Inter-Integrated Sound (I2S) protocols, and intercomponent digital audio interface transmission (DIT).
- EMIF A – External Memory Interfaces
Benefit: EMIFA is used to interface with external memory devices including SDR-SDRAM, ASRAM, NAND Flash & NOR Flash. CPU/EDMA or any other master peripheral uses EMIFA to fetch/write data from/to the external memory device.
- Host Port Interface (HPI)
Benefit: The Host Port Interface (HPI) is a parallel port through which a host processor can directly access the DSP memory space. The host device functions as a master to the interface, which increases ease of access.
- UART
Benefit: The Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel conversion on data received from a peripheral device or modem, and parallel-to-serial conversion on data received from the internal busses.
- Timers
Benefit: The device has 64-bit general-purpose timers that can be used to time events, count events, generate pulses, interrupt the CPU, and send synchronization events to the DMA
For the Peripherals User Guides and Application Notes, please the OMAP-L137 Product Page and OMAP-L138 Product Page
How does OMAPL1x compare to OMAP3?
- ~1/2 performance & ~1/2 price
- Not video centric solution with same Software infrastructure and Linux
- Floating point DSP compared to Fixed point DSP
How does OMAP-L1x and C674x compare to C2000?
| | C2833x | F2823x | F2833x | C674x | OMAP-L137 | OMAP-L138 |
|---|---|---|---|---|---|---|
| Cores | Microprocessor | Microprocessor | Microprocessor | DSP | ARM+DSP | ARM+DSP |
| Commercial OS (VxWorks, etc.) | N | N | N | N | Y | Y |
| Small footprint proprietary OS (DSP BIOS) | Y | Y | Y | Y | Y | Y |
| Integrated internet connectivity (EMAC) | N | N | N | Y | Y | Y |
| External EMAC controller connectivity (via EMIF) | Y | Y | Y | Y | Y | Y |
| Network connectivity (CAN) | Y | Y | Y | N | N | N |
| On-chip Flash | N | Y | Y | N | N | N |
| On-chip ADC | N | Y | Y | N | N | N |
| Total power consumption | 600mW (25C) | 770mW (worst case) | 770mW (worst case) | 435mW (25C) | 485mW (25C) | 440mW (25C) |
| MHz | 300 | 150 | 150 | 300 | 300/300 | 300/300 |
| MFLOPS | 600 | 300 | 300 | 1800 | 2400 | 2400 |
| Code density | High | High | High | Med | Med | Med |
| Industrial temperature | Y | Y | Y | Y | Y | Y |
| Price Range (1ku) | $8.95-16.39 | $12.88-14.55 | $13.85-15.65 | $9.00-12.95 | $16.35 | |
What is the development platform for C674x/OMAPL1x?
- Low cost OMAP-L137/C6747 starter kit $395
- Embedded JTAG support via USB
- Code Composer Studio™ IDE (limited to use on the starter kit)
- Demo version of MontaVista Pro 5.0 tools (to be used with the subsequent releases of this kit)
- High-quality 24-bit stereo codec; Four 3.5mm audio jacks for microphone, line in, speaker and line out
- 4MB Serial Flash and 64MB SDRAM
- Expansion port connector for plug-in modules
- Low cost OMAP-L138/C6748 experimenter $495
- OMAP-L138/C6748 evaluation module $849
NOTE: The C6743, C6745, C6747 and OMAP-L137 all share the same Starter Kit which contains an OMAP-L137 processor (TI Orderable as TMDSOSKL137). Note that the OMAP-L137 and C6747 are the same device except the C6747 does not include the ARM9 core. C6743, C6745 and C6747 are largely similar as well with the C6743 and C6745 having a reduced peripheral set. You can find the differences for these parts on the respective product folders.
NOTE: The C6748, C6746, C6742 and OMAP-L138 all share the same development tools which contains an OMAP-L138 processor (TI Orderable as TMDXOSKL138BET). Note that the OMAP-L138 and C6748 are the same device except the C6748 does not include the ARM9 core. C6748, C6746 and C6742 are largely similar as well with the C6742 and C6746 having a reduced peripheral set. You can find the differences for these parts on the respective product folders.
What power management solutions are available for c674x/OMAPL1x?
- OMAP-L137 Power Management Solutions
- C6747/45 Power Management Solutions
- C6743 Power Management Solutions
- OMAP-L138 Power Management Solutions
- C6748/46/42 Power Management Solutions
What is the SW plan for C674x/OMAPL1x?
- Staged release. See here the plan for the OMAP-L137/C6747 SW release.
How do I get access to the SW SDK?
OMAP-L137 and C6747
- The full explanation on how to get and install the software is in the Getting Started Guide for OMAP-L137 at the Installing the Software for OMAP-L137 section.
- If developing for the C674x DSP-only side, go to the Getting Started Guide for C6747
OMAP-L138 and C6748
- The full explanation on how to get and install the software is in the Getting Started Guide for OMAP-L138 and the Installing the Software for OMAP-L138 section.
- If developing for the C674x DSP-only side, go to the Getting Started Guide for C6748.
What DSP SW libraries are available for C674x/OMAPL1x?
- Software libraries provided to serve different needs
- Building block libraries
- Specialized application/accelerator libraries
- Platform libraries to ease development and improve quality
- All Software libraries provided royalty free. Downloadable from ti.com
- Software libraries include PC equivalent/ Matlab models to ease development and reduce development time
- Most libraries provided in source to allow customization
Building block libraries
IMGLIB and DSPLIB(Fixed Point and Floating Point)
- Optimized building block SW for signal processing applications
- Serve as code optimization examples
- Provided completely in source to allow customization
- Available with test bench and reference C implementation
Specialized application/accelerator libraries
- Get to market faster with ready-to-use signal processing algorithms
- SW libraries for specialized peripherals allow more headroom on DSP for customer differentiation
Platform libraries to ease development and improve quality
- For code requiring precision inbetween fixed and floating point, use IQMath library
- For floating point code increase the execution speed of common mathematical functions using fastMATH
What is the ecosystem? What TI 3rd Parties?
The following pages contain a list of analog and video devices compatible with OMAPL1x and C674x devices.
Where do I go for more information?
- TI Low Power Processors Page
- TI Embedded Processors Wiki main page
Where do I go for training?
- TI Training website see here
- See also TMS320C64x+ DSP System Integration Workshop using DSP/BIOS
Where do I go for support?
- For further discussions and for support go to the TI E2E Community
| For technical support on OMAP please post your questions on The OMAP Forum. Please post only comments about the article C674x/OMAPL1x Introductory Information here. |
Comments
Comments on C674x/OMAPL1x Introductory Information
At least the blockdiagrams to L137 and L138 are dead links. I didn't try the others.
--A0816339 06:08, 10 November 2010 (CST)