C6A816x, AM389x, DM816x, DM814x Debug and Trace Tools

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Important Note:

This wiki is in maintenance mode and information on this wiki may not be current. Questions on this device architecture are supported on DaVinci Processors E2E forum


Features and Use Case Overview

Ti-omap4.jpg XDS560V2-STM.JPG CCSv4 LinuxAware07.PNG


Feature/Use Case Subsystems Brief Description Details Availability                 

Stop mode JTAG debug

Cortex A8 MPU subsystem

Cortex M3 MPU subsystem

IVA-HD subsystem

DSP subsystem


                                          

Reset, wait-in-reset, connect/disconnect, run, low-power run, halt, step, file load, memory, registers, breakpoints and watch-points etc

CCS getting started

                      

Available now

CCS v4.2.2 or later

CCS v5.1


Determine cache performance

                                    

Cortex M3 MPU subsystem

DSP subsystem

Subsystem timing and counting moduldes for cache performance measurements


How to enable SCTM on OMAP4430

                                                          

 Available now

CCS v4.2.2 or later

CCS v5.1


Multi-Core System Trace (STM) based software messages

System level

Hardware accelerated printf based on MIPI STM software generated messages. All cores can generate software messages and the system will provide a time-wise correlated view.  STM SW messages should be collected with XDS560v2 or on-chip ETB.

How to use STM

Available now

CCS v4.2.2 or later

CCS v5.1


Linux device driver for character mode messaging

Cortex A8 MPU subsystem

Character mode device driver for Linux which allows STDIO to be used directly in Linux and Andrioid. Create a device driver for each channel. ex: "/dev/stm1" is a linux device which allows commands like "ls -l > /dev/stm1" to output to MIPI STM.

STM Linux device driver

Available now

CCS v4.2.2 or later

CCS v5.1

Debug and profile IVA-HD

System level

Activity tracing from SMSET of the IVA-HD system for performance optimization and debugging of all functional units. Should be able to see start/stop times for each functional unit. STM SW messages should be collected with XDS560v2 or on-chip ETB.

How to use IVA-HD SMSET

Available now

CCS v4.2.2 or later

CCS v5.1

Profile performance and latency of functional interfaces

System level

Setup, collect and display performance and latency of functional interfaces. Focus  on bytes/cycle (throughput), latency (stalls), and transfer sizes (efficiency). Priority on DDR interface. STM messages should be collected with XDS560v2 or on-chip ETB.

How to use STM Statistics Collector 

Available now

CCS v4.2.2 or later

CCS v5.1

Remote/In-product debugging System level

Program CTools capabilities (SW Message, Statistics Collectors etc.) with software, collect STM information in ETB, customer transfers BIN file to PC, decode and display.

CtoolsLib

Available now

CCS v4.2.2 or later

CCS v5.1

Processor Trace Cortex A8 MPU subsystem

Cortex A8 processor trace collected with XDS560 class receiver or on-chip ETB.

TBD

Available now

CCS v4.2.2 or later

CCS v5.1


Hardware Requirements


GEL Files

  • Please obtain your board specific gel files from TI support team.
  • Look through all the #defines at the top and change them for your platform in your directory (it should run on any combination of vdb / evm / ddr3 / ddr2 / boardmods / driver only / omx / mem test only / interleaved memory or not etc.
  • You should be able to use the gel file seamlessly for any platform by just changing the #define at the top. If this is not the case or if you find a mistake, or if you feel there is a need for more options, please go ahead and send a message to Mahesh Reddy and/or Ajit Rao.
  • OMXinit() is the call to initialize the board after connect.
  • TI814x_trace_dapdebugss.zip and TI816x_trace_dapdebugss.zip contains gel functions to support stm trace and gem core trace. The gel file must be loaded to cs_dap_debugss core before start using trace or STM


Trace

  • Please refer to GEL section to include proper gel files to coresponding nodes before performing trace. Gel files are required to setup chip level configuration.

Core Trace

  • Core trace is only supported using ETB as the receiver. There is no pin trace support in this device

How to collect C64XP Core Trace in the ETB

Configure ETB

  1. Launch the debug session
  2. Connect to the Cortex A8 (if needed to enable the DSP)
  3. Connect to the C674X DSP
  4. Right click in the debug view and select "Show all cores"
  5. Make sure that "CS_DAP_DebugSS" is connected
  6. Select the ETB and connect it
  7. Highlight CS_DAP_DebugSS node, Enable C64XP data sending to ETB via Scripts: Enable_Trace->Enable_ETB_C64XP_Trace
  8. Make sure the DSP is selected in the debug view
  9. To go Tools -> Trace Control. Make sure the DSP tab is selected.
  10. Click on "Receiver" button; select "ETB" from the popup menu and click on "OK".
  11. Now change the configuration parameters as appropriate in the Trace Control if necessary. The default parameters are optimal for most users
  12. Press "OK" now and this will setup the trace receiver channel for the DSP.

Enable Trace Collection

  1. On the toolbar click on the down arrow beside the breakpoint button (blue circle) and select Trace
  2. This will open the breakpoints view and there will be a Trace breakpoint listed.  Right click on it and select Breakpoint properties.
  3. Under Hardware Configuration, expand Type and What to Trace.  Select what you want to capture.  Program Address is typical. Then click Ok.
  4. Check the box beside the breakpoint to enable it.  The color should change from grey to blue.
  5. You can now run your application and collect data.

Viewing Trace Data

  1. Go to Tools -> Open Trace Connection in New View -> <select the core you enabled trace on>
  2. The trace display should now open.

How to collect CortexA8 Core Trace in the ETB

Enable ETM in CCS configuration

Not necessary in CCSv5.2.0 and later

  1. Double click on the target configuration in CCS and select "Advanced" tab to bring up "Target Configuration".
  2. Select ModenaSS node and click on "Add" button on the right hand side.
  3. In the "Add Component" window, select "Cpus" tab. Within the window, select "cs_child" and click on "Finish" button.
  4. High light the newly created node. On the right hand side, put "0x80000000" into Address field and "0x48C6e409" into Identity field.
  5. Save the update and launch the configuration. This will enable drive to support ETM access.

Configure ETB

  1. Launch the debug session
  2. Connect to the Cortex A8
  3. Right click in the debug view and select "Show all cores"
  4. Make sure that "CS_DAP_DebugSS" is connected
  5. Select the ETB and connect it
  6. Highlight CS_DAP_DebugSS node, enable CortexA8 data sending to ETB via Scripts: Enable_Trace->Enable_ETB_CortexA8_Trace
  7. Make sure the CortexA8 is selected in the debug view
  8. To go Tools -> Trace Control. Make sure the CortexA8 tab is selected.
  9. Click on "Receiver" button; select "ETB" from the popup menu and click on "OK".
  10. Now change the configuration parameters as appropriate in the Trace Control if necessary. The default parameters are optimal for most users
  11. Press "OK" now and this will setup the trace receiver channel for the CortexA8.

Enable Trace Collection

  1. On the toolbar click on the down arrow beside the breakpoint button (blue circle) and select Trace
  2. This will open the breakpoints view and there will be a Trace breakpoint listed.  Right click on it and select Breakpoint properties.
  3. Under Hardware Configuration, expand Type and What to Trace.  Select what you want to capture.  Program Address is typical. Then click Ok.
  4. Check the box beside the breakpoint to enable it.  The color should change from grey to blue.
  5. You can now run your application and collect data.

Viewing Trace Data

  1. Go to Tools -> Open Trace Connection in New View -> <select the core you enabled trace on>
  2. The trace display should now open.

System Trace

How to collect STM information in the ETB

  1. Right click in the debug view and select "Show all cores"
  2. Please make sure to connect both "CSSTM" and "CSETB" node from the debug view
  3. Highlight CS_DAP_DebugSS node, Enabe STM data sending to ETB via Scripts: Enable_Trace->Enable_ETB_STM_Trace
  4. Open Trace Control from CCS menu and focus current tab to the 'STM" tab.
  5. Click on "Receiver" button; select "ETB" from the popup menu and click on "OK".
  6. Now change the configuration parameters as appropriate in the Trace Control if necessary. The default parameters are optimal for most users
  7. Press "OK" now and this will setup the trace receiver channel for the STM. On success, you are ready to collect STM data to ETB


How to collect STM information by XDS560 V2 System Trace Emulator receiver

  1. You must be using MIPI-60 pin target connector for STM trace.
  2. Right click in the debug view and select "Show all cores"
  3. Please make sure to connect "CSSTM" node from the debug view.
  4. Highlight CS_DAP_DebugSS, Enable trace data export to EMU pin 0-N via Scripts: Enable_Trace->Enable_STM_NPinMode_Trace. Current supported value of N is either 1 or 4. The recommand pin value is 4 as higher pin value provides higher bandwidth.
  5. Open Trace Control from CCS menu and focus current tab to the 'STM" tab.
  6. Click on "Receiver" button; select "560 V2 Trace" from the popup menu and click on "OK".
  7. Now chnage the configuration parameters as appropriate in the Trace Control. The Trace Bits setting should be N Bit. N is the number used in step 2. The rest default parameters are optimal for most users.
  8. Press "OK" now and this will setup the trace receiver channel for the STM. On success, you ae ready to collect STM data by using XDS560 V2 System Trace Emulator.

FAQ

Q1: When I use Spetrum Digital 560v2 USB emulator to collect STM data, CCS seems to hang for a few minutes and then comes back live. what happened?
Ans: You may experience a firmware bug in SD 560v2 USB emulator. One work around is to use LAN option instead. SD provided a bug fix and it required user to download SD's firmware and do a upgrade to the emulator. The instructions are listed below:

  1. Install CCSV4.2 RC1 or later.
  2. Launch CCS. Select Help->Software Updates->Find and Install... to bring up Install/Update window.
  3. Choose "Search for new features to install"
  4. Check the box in front of "Spectrum Digital CCS4.2 Emulation Updates" and click on Finish button.
  5. Check the box in front of "Spectrum Digital CCS4.2 Emulation Updates" again in the next window. Make sure the version is 4.2.2.2 or later. Follow the window promts to download and install this update.
  6. Make sure the emulator's USB cable is plugged to the PC that install with this update.
  7. Open a DOS command prompt and go to [CCSV4_INSTALL_DIR]\ccsv4\common\uscif
  8. type in "dtc_conf update sd560v2u 0 .\sd560v2_updates\sd_xds560v2_firmware_2.2.0.2" (the firmware version may be different)
  9. follow the instruction on DOS command prompt. It will take a couple minutes to finish the firmware update.


Q2: I received "There are not enough resources available" message when I create jobs(breakpoints) for performance probe in breakpoint manager window. why?
Ans: There are limited amount of counters avaiable for each performance probe. When the counters are all used, this error message will then be shown. The performance probe that monitors EMIF subsystem has only 2 counters. Thus, you can only setup 1 to 2 usecase to monitor EMIF subsystem. Other probes have 4-8 counters.

Demo

TBD

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