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Cc26x2 cc13x2 known issues

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OSAL Heap + ROV Known Issue (applies to all SDKs)

When using ROV Classic and an auto sized OSAL heap, the ROV may generate an exception about reading from and INVALID address. This is related to this XDCTOOLS issue. CCS users are encouraged to use ROV2. For IAR and CCS users using ROV classic, a workaround may be applied by adding the highlighted lines to the package.xs file located at \kernel\tirtos\packages\ti\sysbios\heaps\package.xs.

  1. function init()
  2. {
  3.     /* Add HeapMem's primaryHeap addresses range to ROV's memory sections */
  4.     if (xdc.om.$name == "rov") {
  5.         var HeapMem = xdc.module('ti.sysbios.heaps.HeapMem');
  6. //        if (xdc.om['ti.sysbios.heaps'].HeapMem.$used) {
  7.             var Program = xdc.useModule('xdc.rov.Program');
  8.             var HeapMemCfg =  Program.getModuleConfig(HeapMem.$name);
  9.             if  (HeapMemCfg.primaryHeapBaseAddr != null) {
  10.                 var base = Program.getSymbolValue(HeapMemCfg.primaryHeapBaseAddr.substr(1));
  11.                 var end = Program.getSymbolValue(HeapMemCfg.primaryHeapEndAddr.substr(1));
  12.                 /* Retrieve the MemoryImage java object. */
  13.                 var Model = xdc.module("xdc.rov.Model");
  14.                 var memReader = Model.getMemoryImageInst();
  15.  
  16.                 /* retrieve the sections list and add a new section */
  17.                 var sections = memReader.getSections();
  18.                 sections.addSection(base, end-base);
  19.             }
  20. //        }
  21.             /* Retrieve the MemoryImage java object. */
  22.             var Model = xdc.module("xdc.rov.Model");
  23.             var memReader = Model.getMemoryImageInst();
  24.  
  25.             /* retrieve the sections list and add a new section */
  26.             var sections = memReader.getSections();
  27.             sections.addSection(0x20000000, 0x20014000);
  28.     }
  29. }

SimpleLink CC26x2 SDK v1.60

  • The number of interrupts is incorrectly set, causing some interrupts such as UART 1 to be blocked. Remove the following line from the TI-RTOS cfg file (i.e. ble_debug.cfg, ble_config.cfg)
/* CC2650 has 50 interrupts */
m3Hwi.NUM_INTERRUPTS = 50;