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Codec Engine Examples Memory Map

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This topic helps show the memory map guidelines the Codec Engine development team uses when creating the examples. This is obviously not the only memory map possible, and is intended to help users understand the memory map which most of the examples employ.

Note that these are typically in line with the size of memory available on popular development boards available. Development boards are often available from many vendors, and will be populated with differing amounts of memory.

For more memory map details, see the Changing Memory Map article.

EVM3530 Multi-core Examples (128 MB Total Memory)

Address Range Size Description
0x80000000 - 0x84FFFFFF 80 MB Linux
0x85000000 - 0x85FFFFFF 16 MB CMEM
0x86000000 - 0x877FFFFF 24 MB DDRALGHEAP
0x87800000 - 0x87DFFFFF 6 MB DDR2 (BIOS, Codecs, Applications)
0x87E00000 - 0x87EFFFFF 1 MB DSPLINK (MEM)
0x87F00000 - 0x87F00FFF 4 KB DSPLINK (RESET)
0x87F01000 - 0x87FFFFFF 1020 KB unused

DM6446 and DM6467 EVM Multi-core Examples (256 MB Total Memory)

Address Range Size Description
0x80000000 - 0x877FFFFF 120 MB Linux
0x87800000 - 0x87FFFFFF 8 MB CMEM
0x88000000 - 0x8F9FFFFF 122 MB DDRALGHEAP
0x8FA00000 - 0x8FDFFFFF 4 MB DDR2 (BIOS, Codecs, Applications)
0x8FE00000 - 0x8FEFFFFF 1 MB DSPLINK (MEM)
0x8FF00000 - 0x8FF0007F 128 B DSPLINK (RESET)
0x8FF00080 - 0x8FFFFFFF < 1 MB unused

OMAPL137 and OMAPL138 EVM Multi-core Examples (64 MB Total Memory)

Address Range Size Description
0xC0000000 - 0xC1FFFFFF 32 MB Linux
0xC2000000 - 0xC2BFFFFF 12 MB CMEM
0xC2C00000 - 0xC2EFFFFF 3 MB SDRAM (BIOS, Codecs, Applications)
0xC2F00000 - 0xC2F0FFFF 4 KB DSPLINK (RESET)
0xC2F10000 - 0xC2FFFFFF 1 MB - 4 KB = 1020 KB DSPLINK (MEM)
0xC3000000 - 0xC3FFFFFF 16 MB DDRALGHEAP

Under Development

C6742 Multi-core Examples (256 MB Ext Memory)

Planned for CE 3.20 - currently under development.

Address Range Size Description
0x00200000 - 0x002BFFFF 768 KB SL2RAM (used for IPC and Messaging)
0x00800000 - 0x00897FFF 608 KB LL2RAM (local, core-specific memory)
0xE0000000 - 0xE5FFFFFF 96 MB DDR2 Core 0 App .text and heap (for app I/O buffers)
0xE6000000 - 0xE7FFFFFF 32 MB DDR2 Core 1 Server .text
0xE8000000 - 0xE9FFFFFF 32 MB DDR2 Core 2 Server .text
0xEA000000 - 0xEBFFFFFF 32 MB DDR2 Core 3 Server .text
0xEC000000 - 0xEDFFFFFF 32 MB DDR2 Core 4 Server .text
0xEE000000 - 0xEFFFFFFF 32 MB DDR2 Core 5 Server .text