Cortex-A8 Features

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Contents

Cortex-A8 Highlights

Superscalar Cortex-A8 Core

Cortex-A8 Technologies

Cortex-A8 Technologies Description
TrustZone Security Device Integrity / Secure Transactions
Jazelle RCT Acceleration / Thumb 2EE Instruction Set Fast & Responsive Java Applications
Thumb-2 Instruction Set Greater Performance With Less Code Size
NEON™ Advanced SIMD(+VFPv3) Enhanced Multimedia Experience
Superscalar ARMv7 Core Highest-performance mobile processor

NEON: Advanced SIMD

Neon regs.png

Neon reg width.png

NEON: SIMD Instructions

SIMD.PNG

SIMD Load/Store Structure

Load-store.PNG

Key NEON Capabilites

Thumb-2 Instruction Set

Jazelle RCT Acceleration

Thumb-2EE: Basis of Jazelle RCT

Thumb-2-perf.PNG

Memory System on Cortex-A8

TrustZone Security

Trustzone.png

OMAP ARM Cores Performance Dhrystome V2.1

Perf.PNG

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Comments on Cortex-A8 Features


Terryanderson said ...

We obtained the "official" Dhrystone V2.1 benchmark source code from http://www.netlib.org/benchmark/dhry-c and compiled and ran it. We converted the Dhrystone figure to DMIPS by dividing by 1757 which we understand to be the standard conversion.

On our OMAP 3525 running LynxOS SE at 500 MHz and compiling with LynxWorks cross compiler we get 237.1 DMIPS To compare we used an older board using the OMAP 3430 (that we used prior to 3525 availability) under Monta Vista mobile Linux and using their cross-compiler and got 258.7 DMIPS.

We realize that Dhrystone measurements will vary some due to differences in compilers and OSs but would not expect our getting around 25% of TI's figure.

Can you suggest why we might be getting such drastically lower figures?

--Terryanderson 08:10, 11 February 2011 (CST)

Jefflance01 said ...

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