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This page contains Frequently Asked Questions for the DSPLink POOL module. The POOL module overview is available here: DSPLink POOL Module Overview

Application Programmer Questions

I have configured sufficient total pool size of 4Mbytes. Why am I still getting allocation failure?

The SMAPOOL in DSPLink is not a heap-based pool. It is a fixed-size buffer pool. It requires the specific configuration of number of buffers and sizes as will be used by the application. The exactMatchReq property only allows users the flexibility of configuring an approximate size for each buffer. However, the maximum number of buffers still must be configured.
Example 1:

SMAPOOL_Attrs        poolAttrs ;
Uint32               numBufs = 10 ;
Uint32               size    = 1024 ;
poolAttrs.bufSizes      = (Uint32 *) &size ;
poolAttrs.numBuffers    = (Uint32 *) &numBufs ;
poolAttrs.numBufPools   = 1 ;
poolAttrs.exactMatchReq = TRUE ;

In this scenario, allocation of size 2048 will still fail, since the only supported buffer size is 1024.

Having a total size of 10240 bytes does not make any difference, since the pool is configured as a set of buffers of specified sizes, in this case, 1024 only.

Example 2:

SMAPOOL_Attrs        poolAttrs ;
Uint32               numBufs [3] = {10, 6, 15} ;
Uint32               size [3] ;
size [0] = 1024 ;
size [1] = 4096 ;
size [2] = 5120 ;
poolAttrs.bufSizes      = (Uint32 *) &size ;
poolAttrs.numBuffers    = (Uint32 *) &numBufs ;
poolAttrs.numBufPools   = 3 ;
poolAttrs.exactMatchReq = FALSE ;

In this scenario, note that poolAttrs.exactMatchReq is FALSE. In this case, allocation of size 2048 will pass, and return a buffer of size 4096 (closest higher size). If no free buffer of size 4096 is available, the allocation will fail. It will not look for the next higher buffer size.

Are POOL buffers on DSP-side in cached memory?

Yes, the DSPLINKMEM/DSPLINKMEM1 segments into which the POOL is placed are cacheable on the DSP-side. The control for enabling/disabling cache is with the system integrator through DSP/BIOS configuration. DSPLink maintains cache coherence on DSP-side for all its modules control structures, as well as POOL buffers if they are sent using DSPLink modules such as MSGQ (message buffer cache coherence is performed), CHNL (data transfer cache coherence is performed), NOTIFY (payload cache coherence is performed) and RingIO (data and attribute buffer cache coherence is performed). For protocols which use ListMP and PROC_read/PROC_write in the applications, cache coherency of POOL buffers needs to be done by the application.

Are POOL buffers on GPP-side in cached memory?

No, DSPLink does not support GPP-side cache coherence. The shared memory regions (DSPLINKMEM/DSPLINKMEM1) on GPP-side are reserved in non-cached memory.

Are there any alignment restrictions on POOL buffer sizes?

Yes. POOL buffers must be cache-line size aligned for devices such as TI C64x (128 bytes L2 cache line size for Davinci, DM6437 etc.) This is needed since each buffer must start on a cache-line boundary. In addition, the full POOL size as configured in DSPLink dynamic configuration must also be a multiple of cache-line size to ensure that all DSPLink control structures remain aligned to cache-line boundaries.

Is it essential to open a POOL on GPP-side before calling PROC_start?

For all POOLs that are statically created on the DSP-side, i.e. within the POOL_config structure on DSP-side, it is essential to open these POOLs before calling PROC_start on the GPP-side. However, it is possible to create POOLs dynamically on the DSP-side. For such dynamically created POOLs, the GPP-side can open these POOLs after PROC_start also. For more details, see here: Opening DSP Pools dynamically

I'm getting this error: <1>Configuration error: Incorrect POOL poolSize specified [0x70000]

This happens when your memory entry is not large enough to contain a POOL size of 0x70000. You need to look at /dsplink/config/all/CFG_<PLATFORM>.c. Look at field MEMENTRY within LINKCFG_poolTable_00. Then look at the entry indicated by this index within LINKCFG_memTable_00. The error indicates that the size of this memory entry is not large enough to contain the 0x70000 size pool. The solution is to either increase the size of this memEntry, or reduce the size of POOL (if you don’t need 0x70000 bytes). See here for some more information: Changing DSPLink POOL size

I'm getting a DSP_ERANGE (0x80008013) error when attempting to open a POOL

This error indicates that the POOL configuration parameters (buffer sizes & number of buffers) when creating a POOL (POOL_open) are more than what is configured for the maximum POOL size in DSPLink configuration file /dsplink/config/all/CFG_<PLATFORM>.c. For more details, refer here: Changing DSPLink POOL size

I'm getting a DSP_EINVALIDARG (0x8000800b) error when attempting to open a POOL

One of the possible reasons for this error is that the POOL configuration parameter for buffer sizes is invalid. Check the buffer size to ensure each entry is cache aligned.

I'm getting a DSP_EINVALIDARG (0x8000800b) error when attempting to allocate an entry using POOL_alloc

One of the possible reasons for this error is that the size requested for POOL_alloc is invalid. This maps to failure in getting a buffer with the nearest match for the requested size in case when POOL is configured for exactMatchReq as False. This maps to failure in getting a buffer with the exact match for the requested size when POOL is configured for exactMatchReq as True.

System Programmer Questions

I want to implement my own pool allocator. Where can i get further information on the allocator interface?

See here: Creating custom pool allocators