Introduction

This topic is a list of differences between C2000 External Interface (XINTF) types.

Electrical Specifications

Electrical specifications can change between devices, peripheral types and device families. Always refer to the data manual and errata for a particular device for Electrical Specifications.

C2000 External Interface Types

The following table gives a high level summary of the different types of External Interface found on C28x devices.

**C2000 XINTF Module Types**
Type	Description	Devices	Documentation
0	Original XINTF module Supports 16 Data Bus lines	281x	TMS320x281x External Interface (XINTF) Reference Guide(spru067)
1	Added support for either 16 or 32 Data Bus lines	2833x, 2834x, 2823x	TMS320x2833x, 2823x External Interface (XINTF) Reference Guide (spru949)

Type 1 Compared to Type 0

Data Bus Width

Type 0: Only x16 (16 data lines) is supported.

Type 1: Each XINTF zone can be configured individually to use a 16-bit or 32-bit data bus. Using the 32-bit mode improves performance since 32 bits of data can be read or written in a single access. The data bus width does not change the size of the XINTF zones or memory reach. In 32-bit mode, the lowest address line XA0 becomes a 2nd write enable. The 281x XINTF is limited to a 16-bit data bus.

Address Bus Reach

Type 0: The 281x address reach is 512k x 16 words.

Type 1: The address reach has been extended to 20 address lines. Zone 6 and Zone 7 both use the full address reach of 1M x 16 words each.

Internal Direct Memory Access Bus (DMA)

Type 0: The 281x devices do not include an internal DMA.

Type 1: All three XINTF zones are connected to the on-chip DMA module. The DMA can be used to copy code and data to or from the XINTF while the CPU is processing other data.

XINTF Clock Enable

Type 0: On the 281x, XTIMCLK is always enabled.

Type 1: The XINTF clock (XTIMCLK) is disabled by default to save power. XTIMCLK can be enabled by writing a 1 to bit 12 of the PCLKCR3 register. PCLKCR3 is documented in the device-specific system control and interrupts user's guide. For the F2833x devices, it is TMS320F2833x System Control and Interrupts Reference Guide (literature number SPRUFB0). Turning off XTIMCLK does not turn off XCLKOUT. There is a separate control to turn off XCLKOUT.

XINTF Pin MUXing

Type 0: On the 281x, the XINTF has dedicated pins.

Type 1: Many of the XINTF pins are MUXed with general purpose I/O. The GPIO mux registers must be configured for XINTF operation before you can use the XINTF.

Number of Zones and Chip Select Signals

Type 0: On the 2812 devices, some zone chip-select signals are shared between zones. Zone 0 and Zone 1 share XZCS0AND1 and Zone 6 and Zone 7 share XZCS6AND7.

Type 1: The number of XINTF zones has been reduced to 3: Zone 0, Zone 6 and Zone 7. Each of these zones has a dedicated chip select signal. Zone 0 is still read-followed-by write protected as described in the XINTF reference guide.

Zone 7 Memory Mapping

Type 0: On the 281x devices the MPNMC input signal determines if Zone 7 is mapped. Zone 7 is mirrored within Zone 6.

Type 1: Zone 7 is always mapped. Zone 6 and 7 do not share any locations.

Zone Memory Map Locations

Type 0: On 281x Zone 0 starts at address 0x2000 and is 8K x 16. On 281x these two zones are 512K x 16 and 16K x 16.
Type 1: Zone 0 starts at address 0x4000 and is 4K x 16. Zone 6 and 7 are both 1M x 16 and start at 0x100000 and 0x200000 respectively.

Type 1 Device Specific Differences

Type 1 XINTF is on both the 2833x/2823x and 2834x devices. There is, however, slight device-specific differences:

XA0 and WE1 m

For the F2833x/F2823x devices, XA0 and WE1 share a single pin; however, for the C2834x device, they are separate pins.

XBANK Cycle Selection

2833x/2823x: You must choose the number of delay cycles based on the ratio of XTIMCLK and XCLKOUT. Refer to the XINTF reference guide. C2834x device do not have this requirement.

Electrical Specs

For timing information always refer to the latest data manual for your particular device.

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