Feature Comparison: ARM 926, 1136 and Cortex-A8
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Key parameters of interest
The following table sumarrizes some of the key differences between the ARM 926, ARM 1136 and the ARM Cortex-A8.
| ARM926 | ARM1136 | Cortex-A8 | |
| Architecture Version | V5 | V6 | V7 |
| Pipeline Type | in order,scalar | in order,scalar | in order,dual issue, superscalar |
| Pipeline Stages | 5 | 8 | 13 |
| ISA Efficiency (DMIPS/MHz) | 1.07 | 1.18 | 2.01 |
| MMU | Yes | Yes | Yes |
| TLB | 8 entry unified | 2 uTLB and LB | 2x32 full associativity |
| Core to L1 Interface | 32 bit | 64 bit | 64 bit -- NEON 128 bit |
| L1 $ Set associativity | 4 | 4 | 4 |
| Line Length | 32 Bytes | 32 Bytes | 64 Bytes |
| Tightly coupled memory | Yes | Yes | No |
| Integrated L2 | No | No | Yes |
| Cache Model | VIVT | VIPT | L1 - VIPT
L2 - PIPT |
| Branch Prediction | No | 128 Entry BTB | 512 Entry BTB |
| General Coprocessor Interface | Yes | Yes | No |
| External Interfaces | 2 AHB 2.0 | 5 AHB 2.5 – 3 x 64 bit, 2 x 32 bit | 1 AXI – 64/128 |
| Trustzone support | No | No | Yes |
| Non Cacheable Fill Buffer | 4 word | 8 word | 16 word |
| Java support | Jazelle DBX | Jazelle DBX | Jazelle RCT |
| Floating Point Media | No (coprocessor available, VFP9) | VFP11 attached, V6 Integer SIMD | NEON Integer and FP SIMD, VFP Lite |
| Per-Cycle Multiply-accumulate
throughput (fixed point) | 1 x 32 bit
1 x 16 bit | 1 x 32 bit
2 x 16 bit Float: 2 x 32 bit | 2 x 32 bit 4 x16 bit
8 x 8 bit |
| For technical support on OMAP please post your questions on The OMAP Forum. Please post only comments about the article Feature Comparison: ARM 926, 1136 and Cortex-A8 here. |
