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GSG:Connecting to slave cores in SoC devices

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Connecting to slave cores in SoC devices



Introduction

Most of the devices have a single core. However, in SoC devices usually one of the cores is the master (usually an ARM) and controls one or more additional cores (the slaves). In these cases it is impossible to load and debug code in the slave cores without previous intervention from the master core, which is not only responsible for releasing the slave cores from reset but can also initialize PLLs and external memory interfaces (EMIF).

This page shows how to properly connect and debug code in SoC devices.


Connecting to slave cores in SoC devices

1. Create the target configuration normally using the editor (check the section GSG:Debugging_projects). Make sure the correct GEL files are added (GSG:Adding_GEL_files_to_a_target_configuration).

Tip: in this particular case it is usually easier to find the target configuration if it is saved to a shared location instead of inside a project, but both methods work.


2. Open the target configurations view: go to menu View --> Target Configurations.


3. Right-click on the desired target and select Launch Selected Configuration.

Fig. 3 - Launching a system configuration


4. Once the debugger is launched, right-click on the master core and select Connect Target.

Fig. 4 - Connecting to the master core


5. Go to menu Scripts and select the correct slave core startup GEL script. The exact name varies between devices, but for OMAPL138 it is named DSP wakeup, for OMAP3 it is IVA22_GEM_startup, etc.

Note: the ARM GEL configurations of the latest releases of CCSv4 already enable the DSP at connect time, thus not requiring this step.
Fig. 5 - Releasing the slave core from reset


6. Right-click on the slave core and select Connect Target.


7. Load the program to the target by going to menu Target --> Load Program...

Additional Topics

Now that you have finished learning about Connecting to slave cores in SoC devices, you can check other Advanced Topics of the CCSv4 Getting Started Guide.


CN GSG:Connecting to slave cores in SoC devices