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MCSDK VIDEO 2.1 Demo Guide
Overview of Video Demos
Last updated: 11/11/2013
MCSDK Video release provides multiple video demos to demonstrate capability of TI C66x multi-core DSPs on computation intensive video processing. Some of these are Ethernet based demos while others are PCIe based demos. There are also different DSP binaries used for demos based on the demo. The following table lists demo-title, a brief description about the demo, supported EVMs to run the demo and also a link to wiki page with instructions to run the demo.
Overview of MCSDK Video Demos
This section lists the demos supported in the MCSDK Video 2.x release. Brief description is provided for each demo, while detailed instructions on how to set up and run the demos can be found from the links to the specific wiki pages.
PCIe Based Demos
|Demo Name||Demo Details||Demo Instructions|
|JPEG2000 Decoding Demo||This demo shows real-time JPEG2000 decoding on PCIe interfaced Advantech Lightning DSPC-8681E which is installed on a Linux PC. For the packaged configuration, 24 cores of DSPC-8681E are used for the decoding. Each core receives its JPEG2000 frames from the Linux PC via PCIe, decodes it, and then sends the decoded data back to the Linux PC via PCIe for either display or file saving.||Instruction Link: |
|AVC-Intra 100 Encoder with 10bit YUV 422 @ 1080p60|| This demo shows AVC-Intra-100 encoding across multiple cores and multiple chips onPCIe interfaced Advantech Lightning DSPC-8681E|
which is installed on a Linux PC. Raw YUV data is preloaded into RAMdisk (HDD cannot support real-time disk read to have 1080p60). Within each device, core 0 operates as a master core and cores 1-7 operate as slave cores. Three Devices are necessary to achieve 60fps and X86 interacts with three master cores for encoding. Reorder Queue on X86 takes care of out-of-order encoding of frames by the three devices. We use mplayer2 running on Linux Desktop to decode and display AVC-Intra encoded content in real time
|JPEG2000 Transcoding with 10bit YUV 422 @ 1080p60|| This demo shows JPEG2000 encoding across multiple cores and multiple chips onPCIe interfaced Advantech Lightning DSPC-8682E|
which is installed on a Linux PC. Raw YUV data is preloaded into RAMdisk (HDD cannot support real-time disk read to have 1080p60). Each core operates independently to first do a JPEG2K Encode and immediately do JPEG2K Decode and convert YUV to RGB to prepare of display. Dual Octal cards are necessary to achieve 60fps and X86 interacts with each of the 128 cores to achieve transcoding. Reorder Queue on X86 takes care of out-of-order encoding of frames by the devices. We use OpenGL display thread running on Linux Desktop to receive the transcoded RGB and display in real time
|Codec Integration and Evaluation Demo||Video and Image Codecs published on the web are integrated into the framework. For each of the Codecs, the master core receives data from Linux PC via PCIe, processes the frame (along with slave cores when applicable), and then sends the processed frame back to Linux PC via PCIe for output to a file.|
|HEVC Transcoding @ 720p30 (supported in MCSDK Video 2.2)||This demo shows HEVC encoding and decoding across multiple cores and multiple chips on PCIe interfaced Advantech Lightning DSPC-8682E which is installed on a Linux PC. One Octal card is needed to achieve real-time 720p30 HEVC transcoding.|
|MPEG2 to H264HP transcoding (supported in MCSDK Video 2.2)||This demo shows MPEG2 to H264HP transcoding on PCIe interfaced Advantech Lightning DSPC-8681E which is installed on a Linux PC. Host sends MPEG2 encoded bit stream to DSP, which decodes the bitstream to YUV data. YUV data is then encoded by DSP as H264HP bit stream. DSP sends the encoded H264HP bit stream back to host.|
|H264HP Encoding with TFTP Out (supported in MCSDK Video 2.1)||Based on H264HP Encoding in Codec Integration and Evaluation Demo, this demo has an additional feature of sending the encoded output to network through TFTP. The encoded output is also sent back to Linux PC via PCIe for file saving.|
Ethernet Based Demos
Listed below are Ethernet Based Demos which run on standalone EVM (TMDXEVM6678LXE)
|Demo Name||Demo Details||Demo Instructions|
|Multi-channel Transcoding Demo||This demo shows the capability for multi-channel video transcoding on the C6678. It highlights the software components that provide network processing, video protocol processing, decoding, overlay, resizing, and encoding. This demo uses core 0-5, and there are two transcoding channels on each core. For each transcoding channel, it receives H264BP encoded stream from network, decoding it to YUV, resize YUV from CIF to QCIF (for core 2, 3, 4, and 5), and then encoded YUV to H264BP stream and sends back to network.||Instruction Link: |
|D1 Decoding, Scaling, and Multi-core HD Encoding Demo||This demo highlights the capability of D1 decoding, D1 to High Definition(HD) resizing, and HD encoding using multicore codecs. In this demo, Core 7 receives a 720x480 H264BP encoded stream from network, decodes it to YUV. Then, Core 6 resizes the decoded YUV from 720x480 to 1920x1088. After that, Cores 0-5 encode the resized stream to H264BP stream. For the multi-core encoding, Core 0 is the encoding master core, and it sends the encoded stream back to network.|
|Multi-core 1080p Transcoding Demo||This demo highlights the capability of 1080p transcoding with multicore codecs: 1080p30 H264BP decoding with two cores and 1080p30 H264BP encoding with four cores. In this demo, Core 6 and 7 is the decoding core team with Core 6 as the master decoding core. Core 6 receives 1080p H264BP stream from network, and then decodes it with Core 7 to YUV. After that, Core 0-3 encode the 1080p YUV to H264BP stream. For the multi-core encoding, Core 0 is the encoding master core, and it sends the encoded stream back to network.|
|Codec Integration and Evaluation Demo||This demo shows how to facilitate the development and testing of stand-alone Codecs (including video, audio, and image codecs) using TFTP based data IO. DSP receives input test vector from TFTP server on a PC. Then, the input is decoded or encoded by DSP core(s). After that, the decoded/encoded is sent back to PC via TFTP.||
Instruction Link: 
Useful Resources and Links
Product Download and Updates
For product download and updates, please visit the links listed in the table below.
|Product Download Link|
|MCSDK Video (2.1 GA) Download||http://software-dl.ti.com/sdoemb/sdoemb_public_sw/mcsdk_video/latest/index_FDS.html|
|MCSDK Video (2.2 Alpha) Download|
|BIOS MCSDK Download||http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/02_01_02_05/index_FDS.html|
|Desktop Linux SDK Download||http://software-dl.ti.com/sdoemb/sdoemb_public_sw/desktop_linux_sdk/01_00_00_07/index_FDS.html|
|C6678 Codec Download||http://software-dl.ti.com/dsps/dsps_public_sw/codecs/C6678/index.html|
MCSDK Video Instructions
Please visit the links below to install MCSDK Video, run the video demos, and get the details on how the MCSDK Video demos are developed.
For technical discussions and issues, please visit the links listed in the table below.
|C66x Multicore forum||http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639.aspx|
|Multimedia Software Codecs forum||http://e2e.ti.com/support/embedded/multimedia_software_codecs/default.aspx|
|Code Composer Studio forum||http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/3131.aspx|
|TI C/C++ Compiler forum||http://e2e.ti.com/support/development_tools/compiler/f/343/t/34317.aspx|
|Embedded Processors wiki||http://processors.wiki.ti.com|
Note: When asking for help in the forum you should tag your posts in the Subject with “MCSDK VIDEO”, the part number (e.g. “C6678”) and additionally the component (e.g. “NWAL”).