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MCU Compiler v16

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Available as of v16.9.0.LTS

Power savings improvements (MSP430)

This release adds a new --align_for_power compiler option that enables power savings by aligning all functions and loops to 4 byte boundaries. When this option is specified, power savings will be achieved if a small function or loop aligns to the 32-bit buffer for fetching code from flash. However, there will be less benefit for larger functions and loops. Please see the MSP430 Optimizing C/C++ Compiler v16.9.0.LTS User's Guide for more details.


Improved Stack Usage Utilization

The v16.6.0.STS improvements in inlining exposed issues with constant values being stored on the stack. Improvements were made in this release to avoid using stack space for constant values that can be easily loaded into a register at every use.


ARM and MSP430 compilers now publicly available

User licenses for the ARM and MSP430 compilers have been updated to be TI TSPA (Technology Software Publicly Available). Both compilers are now available without a click-wrap license or export control restrictions and can be redistributed freely. The C2000 compiler has been publicly available since v15.3.0.STS. Please see the software manifest accompanying the software for applicable licensing terms.


Available as of v16.6.0.STS

Code size improvements

64-bit constant load to register (ARM)

This release implements additional optimized MOV instructions for 64-bit constant to registers on Cortex-M3/M4 targets

LZSS compression

In this release, the default compression for C auto initialization tables has been switched from RLE to LZSS. In addition, we improved the stack usage and code size of the LZSS algorithm. Our analysis shows that the improved LZSS algorithm outperforms RLE in almost all cases. In the few cases where RLE is better, the difference is within 1-3%.

If you notice the size of .cinit growing after switching to this compiler version, consider using the --cinit_compression=rle linker option and please report the issue on the E2E forum.

Compressed section alignment

Compressed sections (for RLE and LZSS) within initialized tables are now byte aligned to reduce holes in the .cinit table.

Improved inlining

Improvements were made to the compiler's inlining algorithm that allow better automatic inlining of functions with single call sites. This can result in code side improvements for small functions.

Options Cleanup

This release removes several options that were either duplicates or unnecessary, and results in a simpler interface for specifying compiler options in CCS. For an overview of the changes, please see Compiler option cleanup.

Available as of v16.3.0.STS

New ULP (ultra lower power) Advisor rule 6.3 (MSP430)

This release includes a new ULP Advisor rule 6.3 which will emit a remark if source code for a LEA (lower energy accelerator) capable device does not access the LEA control register. To enable this rule, use option --advice:power=6.3.