MSP430 SimpliciTI Porting Guidelines

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This tutorial describes guidelines to port SimpliciTI v1.1.1 on another MSP430 platform. As an example, this tutorial will show the step by step guideline to port the SimpliciTI code supporting the family1 radio (CC2500, CC1100, CC1101) for MSP-EXP430FG4618 to MSP-EXP430FR5739.

Hardware consideration

The MSP-EXP430FR5739 experimeter board is taken as an exmaple because it has the same RF connection sockets as the MSP-EXP430FG4618 which suit the CCxxxxEM radio development boards from Texas Instruments. Just as for the MSP-EXP430FG4618 SimpliciTI port, the supported radio development boards are:

Other MSP430 experimenter boards which also have the same radio socket as the MSP-EXP430FG4618 and MSP-EXP430FR5739 are the MSP-EXP430F5438 and MSP-EXP430F5529.


SimpliciTI v1.1.1 software design

The SimpliciTI software is designed to clearly separate the hardware-dependent and hardware-independent codes to easily enable portation and further development. The only code which needs to be modified in order to port SimpliciTI to another MSP430 platform is the one under $INSTALL_DIR$\Components\bsp\boards.


Porting Steps

The following chapter shows the steps for porting the existing SimpliciTI source code of a supported MSP430 platform to a new MSP430 platform. For all the source C source and header files described below, it is advised to change the file description in each file from the old platform to the new one.

MSP-EXP430FG4618 MSP-EXP430FR5739
/* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
 *   BSP (Board Support Package)
 *   Target : Texas Instruments MSP-EXP430FG4618
 *            "MSP430FG4618/F2013 Experimenter Board"
 *   Board configuration file.
 * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
 */
/* =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
 *   BSP (Board Support Package)
 *   Target : Texas Instruments MSP-EXP430FR5739
 *            "MSP-EXP430FR5739 Experimenter Board"
 *   Board configuration file.
 * =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
 */


Creating new BSP directory

  • Create a new folder under the $INSTALL_DIR$\Components\bsp\boards with the name of the development board (e.g. EXP430FR5739).
Creating new BSP board folder
  • Copy all the source files (*.c, *.h) e.g. from the EXP461x directory into the new created folder.
Copying source files


Editing bsp_board_defs.h

The bsp_board_defs.h header file contains the necessary macro for defining the unique MSP430 platform in order to enable compile time integrity checking. The following steps show how to modify the header file for new MSP430 platform (e.g. in this case the MSP430FR5739):

  • Change the "Board Unique Define" macro with a unique, non-existing name matching the new MSP430 platform.
MSP-EXP430FG4618 MSP-EXP430FR5739
#define BSP_BOARD_EXP461x
#define BSP_BOARD_EXPFR5739


  • Change the "Compile Time Integrity Checks" to enable compile time checking of the correct MSP430 platform.
MSP-EXP430FG4618 MSP-EXP430FR5739
#if (defined __IAR_SYSTEMS_ICC__) && (__VER__ >= 342)
#if  (!defined __MSP430FG4618__) && (!defined __MSP430FG4619__)
#error "ERROR: Mismatch between specified board and selected microcontroller."
#endif
#endif
#if (defined __IAR_SYSTEMS_ICC__) && (__VER__ >= 342)
#if  (!defined __MSP430FR5739__)
#error "ERROR: Mismatch between specified board and selected microcontroller."
#endif
#endif


Editing bsp_config.h

The bsp_config.h header file contains the necessary compile time settings which is used in the bsp_board.c source file. The purpose of this file is to make it easier for the user for change some compile time settings. For this example with MSP430FR5739, the user can modify the MSP430 clock speed setting and the MPU segmentation.

MSP-EXP430FG4618 MSP-EXP430FR5739
/**************************************************************************************************
 *                                       Configuration                                            *
 **************************************************************************************************
 */
 
/*
 *  Supported clock speeds : 1, 2, 4, 6, 8, 10, 12, and 16 MHz.
 *
 *  NOTE!  The clock speeds are approximate as they are derived from an internal
 *         digitally controlled oscillator.
 */
#define BSP_CONFIG_CLOCK_MHZ_SELECT     8  /* approximate MHz */
 
/*
 *  Custom clock configuration is available.  Provide values for FLLDx, N, and FN_x as
 *  shown in the example below.  The clock speed itself must be provided too.  Providing
 *  a custom configuration overrides the above selection.
 *
 *  #define BSP_CONFIG_CUSTOM_CLOCK_MHZ         1.9988
 *  #define BSP_CONFIG_MSP430_CUSTOM_FLLDx      0
 *  #define BSP_CONFIG_MSP430_CUSTOM_N          60
 *  #define BSP_CONFIG_MSP430_CUSTOM_FN_x       0
 */
 
 
/* ------------------------------------------------------------------------------------------------
 *                                Exported Clock Configuration
 * ------------------------------------------------------------------------------------------------
 */
 
/*
 *   DCO is adjusted via three values:
 *      N      - multiplier value for DCO (see register SCFQCTL)
 *      FLLDx  - additional multiplier for DCO (see register SCFI0)
 *      FN_x   -  range control for DCO (see register SCFI0)
 *
 *   Clock frequency is derived with following formula:
 *      freq = 2^FLLDx * (N + 1) * faclk;   where faclk = 32.768kHz (X2 crystal from board)
 *
 *   Clock frequency must fall within range specifed via FN_x:
 *      0 for 0.65 - 6.1 MHz
 *      1 for 1.3 - 12.1 MHz
 *      2 for 2.0 - 17.9 MHz
 *      4 for 2.8 - 26.6 MHz
 *      8 for 4.2 - 46 MHz
 */
 
#if (defined BSP_CONFIG_CUSTOM_CLOCK_MHZ)    || \
    (defined BSP_CONFIG_MSP430_CUSTOM_FLLDx) || \
    (defined BSP_CONFIG_MSP430_CUSTOM_N)     || \
    (defined BSP_CONFIG_MSP430_CUSTOM_FN_x)
#define BSP_CONFIG_CLOCK_MHZ        BSP_CONFIG_CUSTOM_CLOCK_MHZ
#define BSP_CONFIG_MSP430_FLLDx     BSP_CONFIG_MSP430_CUSTOM_FLLDx
#define BSP_CONFIG_MSP430_N         BSP_CONFIG_MSP430_CUSTOM_N
#define BSP_CONFIG_MSP430_FN_x      BSP_CONFIG_MSP430_CUSTOM_FN_x
#else
 
#if (BSP_CONFIG_CLOCK_MHZ_SELECT == 1)
#define BSP_CONFIG_CLOCK_MHZ      1.0158
#define BSP_CONFIG_MSP430_FLLDx   0
#define BSP_CONFIG_MSP430_N       30
#define BSP_CONFIG_MSP430_FN_x    0
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 2)
#define BSP_CONFIG_CLOCK_MHZ      1.9988
#define BSP_CONFIG_MSP430_FLLDx   0
#define BSP_CONFIG_MSP430_N       60
#define BSP_CONFIG_MSP430_FN_x    0
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 4)
#define BSP_CONFIG_CLOCK_MHZ      3.9977
#define BSP_CONFIG_MSP430_FLLDx   0
#define BSP_CONFIG_MSP430_N       121
#define BSP_CONFIG_MSP430_FN_x    0
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 6)
#define BSP_CONFIG_CLOCK_MHZ      6.0293
#define BSP_CONFIG_MSP430_FLLDx   1
#define BSP_CONFIG_MSP430_N       91
#define BSP_CONFIG_MSP430_FN_x    0
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 8)
#define BSP_CONFIG_CLOCK_MHZ      7.9954
#define BSP_CONFIG_MSP430_FLLDx   1
#define BSP_CONFIG_MSP430_N       121
#define BSP_CONFIG_MSP430_FN_x    2
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 10)
#define BSP_CONFIG_CLOCK_MHZ      9.9615
#define BSP_CONFIG_MSP430_FLLDx   2
#define BSP_CONFIG_MSP430_N       75
#define BSP_CONFIG_MSP430_FN_x    2
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 12)
#define BSP_CONFIG_CLOCK_MHZ      12.0586
#define BSP_CONFIG_MSP430_FLLDx   2
#define BSP_CONFIG_MSP430_N       91
#define BSP_CONFIG_MSP430_FN_x    4
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 16)
#define BSP_CONFIG_CLOCK_MHZ      15.9908
#define BSP_CONFIG_MSP430_FLLDx   2
#define BSP_CONFIG_MSP430_N       121
#define BSP_CONFIG_MSP430_FN_x    4
#else
#error "ERROR: Unsupported clock speed.  Custom clock speeds are possible.  See comments in code."
#endif
 
#endif
/**************************************************************************************************
 *                                         Constants                                              *
 **************************************************************************************************
 */
 
/*
 *  Memory Protection Unit (MPU) Segment Border for MSP430FR5739 (16 KB Main Memory)
 */
#define BSP_MPUSB_PAGE_0       (0x00)   /* 0xC000 - 0xC1FF */
#define BSP_MPUSB_PAGE_1       (0x01)   /* 0xC200 - 0xC3FF */
#define BSP_MPUSB_PAGE_2       (0x02)   /* 0xC400 - 0xC5FF */
#define BSP_MPUSB_PAGE_3       (0x03)   /* 0xC600 - 0xC7FF */
#define BSP_MPUSB_PAGE_4       (0x04)   /* 0xC800 - 0xC9FF */
#define BSP_MPUSB_PAGE_5       (0x05)   /* 0xCA00 - 0xCBFF */
#define BSP_MPUSB_PAGE_6       (0x06)   /* 0xCC00 - 0xCDFF */
#define BSP_MPUSB_PAGE_7       (0x07)   /* 0xCE00 - 0xCFFF */
#define BSP_MPUSB_PAGE_8       (0x08)   /* 0xD000 - 0xD1FF */
#define BSP_MPUSB_PAGE_9       (0x09)   /* 0xD200 - 0xD3FF */
#define BSP_MPUSB_PAGE_10      (0x0A)   /* 0xD400 - 0xD5FF */
#define BSP_MPUSB_PAGE_11      (0x0B)   /* 0xD600 - 0xD7FF */
#define BSP_MPUSB_PAGE_12      (0x0B)   /* 0xD800 - 0xD9FF */
#define BSP_MPUSB_PAGE_13      (0x0C)   /* 0xDA00 - 0xDBFF */
#define BSP_MPUSB_PAGE_14      (0x0D)   /* 0xDC00 - 0xDDFF */
#define BSP_MPUSB_PAGE_15      (0x0E)   /* 0xDE00 - 0xDFFF */
#define BSP_MPUSB_PAGE_16      (0x10)   /* 0xE000 - 0xE1FF */
#define BSP_MPUSB_PAGE_17      (0x11)   /* 0xE200 - 0xE3FF */
#define BSP_MPUSB_PAGE_18      (0x12)   /* 0xE400 - 0xE5FF */
#define BSP_MPUSB_PAGE_19      (0x13)   /* 0xE600 - 0xE7FF */
#define BSP_MPUSB_PAGE_20      (0x14)   /* 0xE800 - 0xE9FF */
#define BSP_MPUSB_PAGE_21      (0x15)   /* 0xEA00 - 0xEBFF */
#define BSP_MPUSB_PAGE_22      (0x16)   /* 0xEC00 - 0xEDFF */
#define BSP_MPUSB_PAGE_23      (0x17)   /* 0xEE00 - 0xEFFF */
#define BSP_MPUSB_PAGE_24      (0x18)   /* 0xF000 - 0xF1FF */
#define BSP_MPUSB_PAGE_25      (0x19)   /* 0xF200 - 0xF3FF */
#define BSP_MPUSB_PAGE_26      (0x1A)   /* 0xF400 - 0xF5FF */
#define BSP_MPUSB_PAGE_27      (0x1B)   /* 0xF600 - 0xF7FF */
#define BSP_MPUSB_PAGE_28      (0x1C)   /* 0xF800 - 0xF9FF */
#define BSP_MPUSB_PAGE_29      (0x1D)   /* 0xFA00 - 0xFBFF */
#define BSP_MPUSB_PAGE_30      (0x1E)   /* 0xFC00 - 0xFDFF */
#define BSP_MPUSB_PAGE_31      (0x1F)   /* 0xFE00 - 0xFFFF */
 
 
 
/**************************************************************************************************
 *                                       Configuration                                            *
 **************************************************************************************************
 */
 
/*
 *  Supported clock speeds : 5, 6, 8, 16, 20, and 24 MHz.
 *
 *  NOTE!  The clock speeds are approximate as they are derived from an internal
 *         digitally controlled oscillator.
 */
#define BSP_CONFIG_CLOCK_MHZ_SELECT     8  /* approximate MHz */
 
/*
 *  MPU segment boundaries
 */
#define BSP_MPU_SEG_BNDRY_1        BSP_MPUSB_PAGE_24
#define BSP_MPU_SEG_BNDRY_2        BSP_MPUSB_PAGE_28
 
/*
 *  MPU segment boundaries access configurations (0=disabled, 1=enabled)
 */
#define MPU_SEG_INFO_VIO_PUC       (0)
#define MPU_SEG_INFO_EXEC          (1)
#define MPU_SEG_INFO_WRITE         (0)
#define MPU_SEG_INFO_READ          (1)
 
#define MPU_SEG_1_VIO_PUC          (0)
#define MPU_SEG_1_EXEC             (1)
#define MPU_SEG_1_WRITE            (0)
#define MPU_SEG_1_READ             (1)
 
#define MPU_SEG_2_VIO_PUC          (0)
#define MPU_SEG_2_EXEC             (1)
#define MPU_SEG_2_WRITE            (0)
#define MPU_SEG_2_READ             (1)
 
#define MPU_SEG_3_VIO_PUC          (0)
#define MPU_SEG_3_EXEC             (1)
#define MPU_SEG_3_WRITE            (0)
#define MPU_SEG_3_READ             (1)
 
/* ------------------------------------------------------------------------------------------------
 *                                Exported Clock Configuration
 * ------------------------------------------------------------------------------------------------
 */
 
#if (BSP_CONFIG_CLOCK_MHZ_SELECT == 5)
  #define BSP_CONFIG_CLOCK_MHZ        (5.33)
  #define BSP_CONFIG_MSP430_DCORSEL   (0)
  #define BSP_CONFIG_MSP430_DCOFSEL   (0)
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 6)
  #define BSP_CONFIG_CLOCK_MHZ        (6.67)
  #define BSP_CONFIG_MSP430_DCORSEL   (0)
  #define BSP_CONFIG_MSP430_DCOFSEL   (DCOFSEL1)
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 8)
  #define BSP_CONFIG_CLOCK_MHZ        (8)
  #define BSP_CONFIG_MSP430_DCORSEL   (0)
  #define BSP_CONFIG_MSP430_DCOFSEL   (DCOFSEL1 + DCOFSEL1)
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 16)
  #define BSP_CONFIG_CLOCK_MHZ        (16)
  #define BSP_CONFIG_MSP430_DCORSEL   (DCORSEL)
  #define BSP_CONFIG_MSP430_DCOFSEL   (0)
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 20)
  #define BSP_CONFIG_CLOCK_MHZ        (20)
  #define BSP_CONFIG_MSP430_DCORSEL   (DCORSEL)
  #define BSP_CONFIG_MSP430_DCOFSEL   (DCOFSEL1)
#elif (BSP_CONFIG_CLOCK_MHZ_SELECT == 24)
  #define BSP_CONFIG_CLOCK_MHZ        (24)
  #define BSP_CONFIG_MSP430_DCORSEL   (DCORSEL)
  #define BSP_CONFIG_MSP430_DCOFSEL   (DCOFSEL1 + DCOFSEL1)
#else
  #error "ERROR: Unsupported clock speed.  Custom clock speeds are possible.  See comments in code."
#endif
 
#define BSP_MPU_SAM_VALUE   ((MPU_SEG_INFO_VIO_PUC << 15) + \
                             (MPU_SEG_INFO_EXEC    << 14) + \
                             (MPU_SEG_INFO_WRITE   << 13) + \
                             (MPU_SEG_INFO_READ    << 12) + \
                             (MPU_SEG_3_VIO_PUC    << 11) + \
                             (MPU_SEG_3_EXEC       << 10) + \
                             (MPU_SEG_3_WRITE      <<  9) + \
			     (MPU_SEG_3_READ       <<  8) + \
			     (MPU_SEG_2_VIO_PUC    <<  7) + \
			     (MPU_SEG_2_EXEC       <<  6) + \
			     (MPU_SEG_2_WRITE      <<  5) + \
			     (MPU_SEG_2_READ       <<  4) + \
			     (MPU_SEG_1_VIO_PUC    <<  3) + \
                             (MPU_SEG_1_EXEC       <<  2) + \
			     (MPU_SEG_1_WRITE      <<  1) + \
                             (MPU_SEG_1_READ))


Editing bsp_board.c

The bsp_board.c file contains the basic initialization functions for the new MSP430 platform using the configuration in bsp_config.h, as well as the implementation of delay function.

  • The BSP_EARLY_INIT() function can be left unchanged, because it is used to stop the WDT during C startup/initialization step.
  • The BSP_InitBoard() function should be modified to initialize the new MSP430 device platform. In this implementation with the MSP430FR5739 FRAM device, the following steps are executed in this function: initializing MPU unit for FRAM device, initializing clock module, and initializing timer module which will be used by the BSP_Delay() function.
MSP-EXP430FG4618 MSP-EXP430FR5739
void BSP_InitBoard(void)
{
  /* set MCU clock speed - driven by internal Digitally Controlled Oscillator (DCO) */
  SCFQCTL   = BSP_CONFIG_MSP430_N;
  SCFI0     = (BSP_CONFIG_MSP430_FLLDx << 6) | (BSP_CONFIG_MSP430_FN_x << 2);
  FLL_CTL0  = DCOPLUS | XCAP14PF;   /* enable divider, set osc capacitance */
 
  /* Configure TimerA for use by the delay function */
 
  /* Reset the timer */
  TACTL |= TACLR; /* Set the TACLR  */
 
  /* Clear all settings */
  TACTL = 0x0;
 
  /* Select the clk source to be - SMCLK (Sub-Main CLK)*/
  TACTL |= TASSEL_2;
 
#if defined(SW_TIMER)
#define MHZ_CLOCKS_PER_USEC      BSP_CLOCK_MHZ
#define MHZ_CLOCKS_PER_ITERATION 10
 
  sIterationsPerUsec = (uint8_t)(((MHZ_CLOCKS_PER_USEC)/(MHZ_CLOCKS_PER_ITERATION))+.5);
 
  if (!sIterationsPerUsec)
  {
    sIterationsPerUsec = 1;
  }
#endif   /* SW_TIMER */
}
void BSP_InitBoard(void)
{
  /* set MPU to protect code*/
  MPUCTL0 = MPUPW;                                  // Write PWD to enable write access of MPU regs
  MPUSEG = (BSP_MPU_SEG_BNDRY_1 << 8) + BSP_MPU_SEG_BNDRY_1;    // set MPU segment boundaries
  MPUSAM = BSP_MPU_SAM_VALUE;              // set segments access configurations
  MPUCTL0 = MPUPW + MPUENA;                // Enable MPU protection
 
  /* set MCU clock speed - driven by internal Digitally Controlled Oscillator (DCO) */
  CSCTL0 = CSKEY;
  CSCTL1 |= BSP_CONFIG_MSP430_DCORSEL + BSP_CONFIG_MSP430_DCOFSEL;
  CSCTL2 = SELA__VLOCLK +  SELS__DCOCLK + SELM__DCOCLK;
  CSCTL3 = DIVA_0 + DIVS_0 + DIVM_0;        // set all dividers to 0
 
  /* Configure TimerA for use by the delay function */
 
  /* Reset the timer */
  TA0CTL |= TACLR; /* Set the TACLR  */
 
  /* Clear all settings */
  TA0CTL = 0x0;
 
  /* Select the clk source to be - SMCLK (Sub-Main CLK)*/
  TA0CTL |= TASSEL_2;
 
#if defined(SW_TIMER)
#define MHZ_CLOCKS_PER_USEC      BSP_CLOCK_MHZ
#define MHZ_CLOCKS_PER_ITERATION 10
 
  sIterationsPerUsec = (uint8_t)(((MHZ_CLOCKS_PER_USEC)/(MHZ_CLOCKS_PER_ITERATION))+.5);
 
  if (!sIterationsPerUsec)
  {
    sIterationsPerUsec = 1;
  }
#endif   /* SW_TIMER */
}
  • The BSP_Delay() function should be modified to implement delay functionality with the new MSP430 device platform.
MSP-EXP430FG4618 MSP-EXP430FR5739
void BSP_Delay(uint16_t usec)
#if !defined(SW_TIMER)
{
 
  TAR = 0; /* initial count  */
  TACCR0 = BSP_TIMER_CLK_MHZ*usec; /* compare count. (delay in ticks) */
 
  /* Start the timer in UP mode */
  TACTL |= MC_1;
 
  /* Loop till compare interrupt flag is set */
  while(!(TACCTL0 & CCIFG));
 
  /* Stop the timer */
  TACTL &= ~(MC_1);
 
  /* Clear the interrupt flag */
   TACCTL0 &= ~CCIFG;
}
#else   /* !SW_TIMER */
{
  /* Declared 'volatile' in case User optimizes for speed. This will
   * prevent the optimizer from eliminating the loop completely. But
   * it also generates more code...
   */
  volatile uint16_t repeatCount = (sIterationsPerUsec*usec)/2;
 
  while (repeatCount--) ;
 
  return;
}
 
#endif  /* !SW_TIMER */
void BSP_Delay(uint16_t usec)
#if !defined(SW_TIMER)
{
  TA0CTL |= TACLR;
  TA0CCR0 = BSP_TIMER_CLK_MHZ*usec; /* compare count. (delay in ticks) */
 
  /* Start the timer in UP mode */
  TA0CTL |= MC_1;
 
  /* Loop till compare interrupt flag is set */
  while(!(TA0CCTL0 & CCIFG));
 
  /* Stop the timer */
  TA0CTL &= ~(MC_1);
 
  /* Clear the interrupt flag */
   TA0CCTL0 &= ~CCIFG;
}
#else   /* !SW_TIMER */
{
  /* Declared 'volatile' in case User optimizes for speed. This will
   * prevent the optimizer from eliminating the loop completely. But
   * it also generates more code...
   */
  volatile uint16_t repeatCount = (sIterationsPerUsec*usec)/2;
 
  while (repeatCount--) ;
 
  return;
}
#endif  /* !SW_TIMER */


  • The last part of this file can be used to check compile time integrity which is used in this file.
MSP-EXP430FG4618 MSP-EXP430FR5739
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#if (!defined BSP_CONFIG_MSP430_N) || \
    (BSP_CONFIG_MSP430_N == 0) || (BSP_CONFIG_MSP430_N > 127)
#error "ERROR: Missing or illegal value for N (see register SCFQCTL)."
#endif
 
#if (!defined BSP_CONFIG_MSP430_FLLDx) || (BSP_CONFIG_MSP430_FLLDx > 3)
#error "ERROR: Missing or illegal value for FLLDx (see register SCFI0)."
#endif
 
#if (!defined BSP_CONFIG_MSP430_FN_x) || (BSP_CONFIG_MSP430_FN_x > 15)
#error "ERROR: Missing or illegal value for FLLDx (see register SCFI0)."
#endif
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#if (!defined BSP_CONFIG_MSP430_DCORSEL)
#error "ERROR: Missing value for DCORSEL (see register CSCTL1)."
#endif
 
#if (!defined BSP_CONFIG_MSP430_DCOFSEL)
#error "ERROR: Missing value for DCOFSEL (see register CSCTL1)."
#endif


Editing bsp_driver_defs.h and bsp_drivers.c

The bsp_driver_defs.h and bsp_drivers.c contain the declaration and definition of initialization function for LED and buttons which is hardware independent. Therefore in this case it can be left as it is, with the exception that the file description part should be modified as described above.



Editing bsp_button_defs.h

The bsp_button_defs.h contains the definition(s) of push-button available on the new MSP430 platform. As can be seen in the MSP-EXP430FR5739 board schematic which can be found in the [User's Guide document], the board has basically two push buttons connected to P4.0 (S1) and P4.1 (S2). However P4.1 is also connected to GDO0 line of the RF module.

MSP-EXP430FR5739 push buttons and RF connections

Therefore only the S1 is defined in this header file:

MSP-EXP430FG4618 MSP-EXP430FR5739
/* ------------------------------------------------------------------------------------------------
 *                                      Button Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __bsp_NUM_BUTTONS__                   2
#define __bsp_BUTTON_DEBOUNCE_WAIT__(expr)    st( int i; for(i=0; i<500; i++) { if (!(expr)) i = 0; } )
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 BUTTON #1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic   :  S1
 *   Description :  Push Button
 *   Polarity    :  Active Low
 *   GPIO        :  P1.0
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_BUTTON1_BIT__             0
#define __bsp_BUTTON1_PORT__            P1IN
#define __bsp_BUTTON1_IS_ACTIVE_LOW__   1
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 BUTTON #2
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic   :  S2
 *   Description :  Push Button
 *   Polarity    :  Active Low
 *   GPIO        :  P1.1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_BUTTON2_BIT__             1
#define __bsp_BUTTON2_PORT__            P1IN
#define __bsp_BUTTON2_IS_ACTIVE_LOW__   1
/* ------------------------------------------------------------------------------------------------
 *                                      Button Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __bsp_NUM_BUTTONS__                   1
#define __bsp_BUTTON_DEBOUNCE_WAIT__(expr)    st( int i; for(i=0; i<500; i++) { if (!(expr)) i = 0; } )
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 BUTTON #1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic   :  S1
 *   Description :  Push Button
 *   Polarity    :  Active Low
 *   GPIO        :  P4.0
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_BUTTON1_BIT__             0
#define __bsp_BUTTON1_PORT__            P4IN
#define __bsp_BUTTON1_IS_ACTIVE_LOW__   1
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *          Extended Configuration
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
/* enable a pull-up resistor for button #1 */
#define __bsp_BUTTON_EXTENDED_CONFIG__()  st( P4OUT |= BV( __bsp_BUTTON1_BIT__ ); \
                                              P4REN |= BV( __bsp_BUTTON1_BIT__ ); )


Editing bsp_leds_defs.h

The bsp_button_leds.h contains the definition(s) of LED(s) available on the new MSP430 platform. As can be seen in the MSP-EXP430FR5739 board schematic which can be found in the [User's Guide document], the board has basically eight LEDs (LED1 - LED8) connected to PJ.0-PJ.3 and P3.4 - P3.7.

MSP-EXP430FR5739 LEDs
MSP-EXP430FG4618 MSP-EXP430FR5739
/* ------------------------------------------------------------------------------------------------
 *                                      Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __bsp_NUM_LEDS__               3
#define __bsp_LED_BLINK_LOOP_COUNT__   0x34000
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED1
 *   Color     :  Green
 *   Polarity  :  Active High
 *   GPIO      :  P2.2
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED1_BIT__            2
#define __bsp_LED1_PORT__           P2OUT
#define __bsp_LED1_DDR__            P2DIR
#define __bsp_LED1_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #2
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED2
 *   Color     :  Yellow
 *   Polarity  :  Active High
 *   GPIO      :  P2.1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED2_BIT__            1
#define __bsp_LED2_PORT__           P2OUT
#define __bsp_LED2_DDR__            P2DIR
#define __bsp_LED2_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #3
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED4 (see note)
 *   Color     :  Red
 *   Polarity  :  Active High
 *   GPIO      :  P5.1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED3_BIT__            1
#define __bsp_LED3_PORT__           P5OUT
#define __bsp_LED3_DDR__            P5DIR
#define __bsp_LED3_IS_ACTIVE_LOW__  0
 
/*
 * Note : On the board, this LED is labeled LED4 but it is controlled via macros
 *        referencig LED3.  The break in sequence is due to LED3 not being
 *        accessible by this processor.
 */
/* ------------------------------------------------------------------------------------------------
 *                                      Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __bsp_NUM_LEDS__               8
#define __bsp_LED_BLINK_LOOP_COUNT__   0x34000
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED1
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  PJ.0
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED1_BIT__            0
#define __bsp_LED1_PORT__           PJOUT
#define __bsp_LED1_DDR__            PJDIR
#define __bsp_LED1_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #2
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED2
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  PJ.1
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED2_BIT__            1
#define __bsp_LED2_PORT__           PJOUT
#define __bsp_LED2_DDR__            PJDIR
#define __bsp_LED2_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #3
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED3
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  PJ.2
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED3_BIT__            2
#define __bsp_LED3_PORT__           PJOUT
#define __bsp_LED3_DDR__            PJDIR
#define __bsp_LED3_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #4
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED4
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  PJ.3
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED4_BIT__            3
#define __bsp_LED4_PORT__           PJOUT
#define __bsp_LED4_DDR__            PJDIR
#define __bsp_LED4_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #5
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED5
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  P3.4
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED5_BIT__            4
#define __bsp_LED5_PORT__           P3OUT
#define __bsp_LED5_DDR__            P3DIR
#define __bsp_LED5_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #6
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED6
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  P3.5
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED6_BIT__            5
#define __bsp_LED6_PORT__           P3OUT
#define __bsp_LED6_DDR__            P3DIR
#define __bsp_LED6_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #7
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED7
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  P3.6
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED7_BIT__            6
#define __bsp_LED7_PORT__           P3OUT
#define __bsp_LED7_DDR__            P3DIR
#define __bsp_LED7_IS_ACTIVE_LOW__  0
 
 
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *                 LED #8
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *   Schematic :  LED8
 *   Color     :  Blue
 *   Polarity  :  Active High
 *   GPIO      :  P3.7
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 */
#define __bsp_LED8_BIT__            7
#define __bsp_LED8_PORT__           P3OUT
#define __bsp_LED8_DDR__            P3DIR
#define __bsp_LED8_IS_ACTIVE_LOW__  0


Editing mrfi_board.c

The mrfi_board.c contains the assignment of the GPIO ISR function. The only changes needed to be done are as follows:

MSP-EXP430FG4618 MSP-EXP430FR5739
/**************************************************************************************************
 * @fn          MRFI_GpioPort1Isr
 *
 * @brief       -
 *
 * @param       -
 *
 * @return      -
 **************************************************************************************************
 */
BSP_ISR_FUNCTION( BSP_GpioPort1Isr, PORT1_VECTOR )
{
  /*
   *  This ISR is easily replaced.  The new ISR must simply
   *  include the following function call.
   */
  MRFI_GpioIsr();
}
 
 
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#include "mrfi_board_defs.h"
 
#if ( MRFI_GDO0_INT_VECTOR != PORT1_VECTOR )
#error "ERROR:  Mismatch with specified vector and actual ISR."
/*
 *  The most likely fix is to modify the vector in the above ISR.
 *  This compile time check would need updated too.
 */
#endif
/**************************************************************************************************
 * @fn          MRFI_GpioPort1Isr
 *
 * @brief       -
 *
 * @param       -
 *
 * @return      -
 **************************************************************************************************
 */
BSP_ISR_FUNCTION( BSP_GpioPort1Isr, PORT4_VECTOR )
{
  /*
   *  This ISR is easily replaced.  The new ISR must simply
   *  include the following function call.
   */
  MRFI_GpioIsr();
}
 
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#include "mrfi_board_defs.h"
 
#if ( MRFI_GDO0_INT_VECTOR != PORT4_VECTOR )
#error "ERROR:  Mismatch with specified vector and actual ISR."
/*
 *  The most likely fix is to modify the vector in the above ISR.
 *  This compile time check would need updated too.
 */
#endif


Editing mrfi_board_defs.h

The mrfi_board_defs.h header file defines the connections between the MSP430 and the RF module. The figure below shows the comparison of the connections between MSP430-EXP430FR5739 and CC2500EM.

MSP-EXP430FR5739 - CC2500EM connections
  • Modify the setting of GDO0 and GDO2 pin configurations. GDO0 is connected to P4.1 and GDO2 is connected to P2.3
MSP-EXP430FG4618 MSP-EXP430FR5739
/* ------------------------------------------------------------------------------------------------
 *                                      GDO0 Pin Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __mrfi_GDO0_BIT__                     2
#define MRFI_CONFIG_GDO0_PIN_AS_INPUT()       /* nothing required */
#define MRFI_GDO0_PIN_IS_HIGH()               (P1IN & BV(__mrfi_GDO0_BIT__))
 
#define MRFI_GDO0_INT_VECTOR                  PORT1_VECTOR
#define MRFI_ENABLE_GDO0_INT()                st( P1IE  |=  BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_DISABLE_GDO0_INT()               st( P1IE  &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_GDO0_INT_IS_ENABLED()             (  P1IE  &   BV(__mrfi_GDO0_BIT__) )
#define MRFI_CLEAR_GDO0_INT_FLAG()            st( P1IFG &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_GDO0_INT_FLAG_IS_SET()            (  P1IFG &   BV(__mrfi_GDO0_BIT__) )
#define MRFI_CONFIG_GDO0_RISING_EDGE_INT()    st( P1IES &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_CONFIG_GDO0_FALLING_EDGE_INT()   st( P1IES |=  BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
 
 
/* ------------------------------------------------------------------------------------------------
 *                                      GDO2 Pin Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __mrfi_GDO2_BIT__                     3
#define MRFI_CONFIG_GDO2_PIN_AS_INPUT()       /* nothing required */
#define MRFI_GDO2_PIN_IS_HIGH()               (P1IN & BV(__mrfi_GDO2_BIT__))
 
#define MRFI_GDO2_INT_VECTOR                  PORT1_VECTOR
#define MRFI_ENABLE_GDO2_INT()                st( P1IE  |=  BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_DISABLE_GDO2_INT()               st( P1IE  &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_GDO2_INT_IS_ENABLED()             (  P1IE  &   BV(__mrfi_GDO2_BIT__) )
#define MRFI_CLEAR_GDO2_INT_FLAG()            st( P1IFG &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_GDO2_INT_FLAG_IS_SET()            (  P1IFG &   BV(__mrfi_GDO2_BIT__) )
#define MRFI_CONFIG_GDO2_RISING_EDGE_INT()    st( P1IES &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_CONFIG_GDO2_FALLING_EDGE_INT()   st( P1IES |=  BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
/* ------------------------------------------------------------------------------------------------
 *                                      GDO0 Pin Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __mrfi_GDO0_BIT__                     1
#define MRFI_CONFIG_GDO0_PIN_AS_INPUT()       /* nothing required */
#define MRFI_GDO0_PIN_IS_HIGH()               (P4IN & BV(__mrfi_GDO0_BIT__))
 
#define MRFI_GDO0_INT_VECTOR                  PORT4_VECTOR
#define MRFI_ENABLE_GDO0_INT()                st( P4IE  |=  BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_DISABLE_GDO0_INT()               st( P4IE  &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_GDO0_INT_IS_ENABLED()             (  P4IE  &   BV(__mrfi_GDO0_BIT__) )
#define MRFI_CLEAR_GDO0_INT_FLAG()            st( P4IFG &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_GDO0_INT_FLAG_IS_SET()            (  P4IFG &   BV(__mrfi_GDO0_BIT__) )
#define MRFI_CONFIG_GDO0_RISING_EDGE_INT()    st( P4IES &= ~BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
#define MRFI_CONFIG_GDO0_FALLING_EDGE_INT()   st( P4IES |=  BV(__mrfi_GDO0_BIT__); ) /* atomic operation */
 
 
/* ------------------------------------------------------------------------------------------------
 *                                      GDO2 Pin Configuration
 * ------------------------------------------------------------------------------------------------
 */
#define __mrfi_GDO2_BIT__                     3
#define MRFI_CONFIG_GDO2_PIN_AS_INPUT()       /* nothing required */
#define MRFI_GDO2_PIN_IS_HIGH()               (P2IN & BV(__mrfi_GDO2_BIT__))
 
#define MRFI_GDO2_INT_VECTOR                  PORT2_VECTOR
#define MRFI_ENABLE_GDO2_INT()                st( P2IE  |=  BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_DISABLE_GDO2_INT()               st( P2IE  &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_GDO2_INT_IS_ENABLED()             (  P2IE  &   BV(__mrfi_GDO2_BIT__) )
#define MRFI_CLEAR_GDO2_INT_FLAG()            st( P2IFG &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_GDO2_INT_FLAG_IS_SET()            (  P2IFG &   BV(__mrfi_GDO2_BIT__) )
#define MRFI_CONFIG_GDO2_RISING_EDGE_INT()    st( P2IES &= ~BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
#define MRFI_CONFIG_GDO2_FALLING_EDGE_INT()   st( P2IES |=  BV(__mrfi_GDO2_BIT__); ) /* atomic operation */
  • Configure the SPI interface pins:
MSP-EXP430FG4618 MSP-EXP430FR5739
/* ------------------------------------------------------------------------------------------------
 *                                      SPI Configuration
 * ------------------------------------------------------------------------------------------------
 */
 
/* CSn Pin Configuration */
#define __mrfi_SPI_CSN_GPIO_BIT__             2
#define MRFI_SPI_CONFIG_CSN_PIN_AS_OUTPUT()   st( P4DIR |=  BV(__mrfi_SPI_CSN_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_CSN_HIGH()             st( P4OUT |=  BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_DRIVE_CSN_LOW()              st( P4OUT &= ~BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_CSN_IS_HIGH()                 (  P4OUT &   BV(__mrfi_SPI_CSN_GPIO_BIT__) )
 
/* SCLK Pin Configuration */
#define __mrfi_SPI_SCLK_GPIO_BIT__            5
#define MRFI_SPI_CONFIG_SCLK_PIN_AS_OUTPUT()  st( P4DIR |=  BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_HIGH()            st( P4OUT |=  BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_LOW()             st( P4OUT &= ~BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
 
/* SI Pin Configuration */
#define __mrfi_SPI_SI_GPIO_BIT__              3
#define MRFI_SPI_CONFIG_SI_PIN_AS_OUTPUT()    st( P4DIR |=  BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_HIGH()              st( P4OUT |=  BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_LOW()               st( P4OUT &= ~BV(__mrfi_SPI_SI_GPIO_BIT__); )
 
/* SO Pin Configuration */
#define __mrfi_SPI_SO_GPIO_BIT__              4
#define MRFI_SPI_CONFIG_SO_PIN_AS_INPUT()     /* nothing to required */
#define MRFI_SPI_SO_IS_HIGH()                 ( P4IN & BV(__mrfi_SPI_SO_GPIO_BIT__) )
 
/* SPI Port Configuration */
#define MRFI_SPI_CONFIG_PORT()                st( P4SEL |= BV(__mrfi_SPI_SCLK_GPIO_BIT__) |  \
                                                           BV(__mrfi_SPI_SI_GPIO_BIT__)   |  \
                                                           BV(__mrfi_SPI_SO_GPIO_BIT__); )
 
/* read/write macros */
#define MRFI_SPI_WRITE_BYTE(x)                st( IFG2 &= ~URXIFG1;  U1TXBUF = x; )
#define MRFI_SPI_READ_BYTE()                  U1RXBUF
#define MRFI_SPI_WAIT_DONE()                  while(!(IFG2 & URXIFG1));
 
/* SPI critical section macros */
typedef bspIState_t mrfiSpiIState_t;
#define MRFI_SPI_ENTER_CRITICAL_SECTION(x)    BSP_ENTER_CRITICAL_SECTION(x)
#define MRFI_SPI_EXIT_CRITICAL_SECTION(x)     BSP_EXIT_CRITICAL_SECTION(x)
/* ------------------------------------------------------------------------------------------------
 *                                      SPI Configuration
 * ------------------------------------------------------------------------------------------------
 */
 
/* CSn Pin Configuration */
#define __mrfi_SPI_CSN_GPIO_BIT__             3
#define MRFI_SPI_CONFIG_CSN_PIN_AS_OUTPUT()   st( P1DIR |=  BV(__mrfi_SPI_CSN_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_CSN_HIGH()             st( P1OUT |=  BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_DRIVE_CSN_LOW()              st( P1OUT &= ~BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_CSN_IS_HIGH()                 (  P1OUT &   BV(__mrfi_SPI_CSN_GPIO_BIT__) )
 
/* SCLK Pin Configuration */
#define __mrfi_SPI_SCLK_GPIO_BIT__            2
#define MRFI_SPI_CONFIG_SCLK_PIN_AS_OUTPUT()  st( P2DIR |=  BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_HIGH()            st( P2OUT |=  BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_LOW()             st( P2OUT &= ~BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
 
/* SI Pin Configuration */
#define __mrfi_SPI_SI_GPIO_BIT__              6
#define MRFI_SPI_CONFIG_SI_PIN_AS_OUTPUT()    st( P1DIR |=  BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_HIGH()              st( P1OUT |=  BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_LOW()               st( P1OUT &= ~BV(__mrfi_SPI_SI_GPIO_BIT__); )
 
/* SO Pin Configuration */
#define __mrfi_SPI_SO_GPIO_BIT__              7
#define MRFI_SPI_CONFIG_SO_PIN_AS_INPUT()     /* nothing to required */
#define MRFI_SPI_SO_IS_HIGH()                 ( P1IN & BV(__mrfi_SPI_SO_GPIO_BIT__) )
 
/* SPI Port Configuration */
#define MRFI_SPI_CONFIG_PORT()                st( P1SEL1 |= BV(__mrfi_SPI_SI_GPIO_BIT__)   |     \
                                                            BV(__mrfi_SPI_SO_GPIO_BIT__);        \
                                                  P1SEL0 &= ~(BV(__mrfi_SPI_SI_GPIO_BIT__) |     \
                                                              BV(__mrfi_SPI_SO_GPIO_BIT__));     \
                                                  P2SEL1 |= BV(__mrfi_SPI_SCLK_GPIO_BIT__);      \
						  P2SEL0 &= ~(BV(__mrfi_SPI_SCLK_GPIO_BIT__)); )
 
/* read/write macros */
#define MRFI_SPI_WRITE_BYTE(x)                st( UCB0STATW &= ~UCBUSY;  UCB0TXBUF = x; )
#define MRFI_SPI_READ_BYTE()                  UCB0RXBUF
#define MRFI_SPI_WAIT_DONE()                  while(UCB0STATW & UCBUSY);
 
/* SPI critical section macros */
typedef bspIState_t mrfiSpiIState_t;
#define MRFI_SPI_ENTER_CRITICAL_SECTION(x)    BSP_ENTER_CRITICAL_SECTION(x)
#define MRFI_SPI_EXIT_CRITICAL_SECTION(x)     BSP_EXIT_CRITICAL_SECTION(x)
  • Modify the SPI initialization function macro:
MSP-EXP430FG4618 MSP-EXP430FR5739
#define MRFI_SPI_INIT() \
st ( \
  U1CTL  = SWRST;                     \
  U1CTL  = SWRST | MM | SYNC | CHAR;  \
  U1TCTL = CKPH | STC | SSEL1;        \
  U1BR0  = 2;                         \
  U1BR1  = 0;                         \
  U1MCTL = 0;                         \
  ME2 |= USPIE1;                      \
  MRFI_SPI_CONFIG_PORT();             \
  U1CTL &= ~SWRST;                    \
)
 
#define MRFI_SPI_IS_INITIALIZED()     (U1TCTL & CKPH)
#define MRFI_SPI_INIT()                                                \
st (                                                                   \
  UCB0CTLW0 |= UCSWRST;                                                \
  UCB0CTLW0 |= UCMST + UCMSB + UCSYNC + UCCKPH + UCSSEL_2 + UCSTEM + UCMODE_2; \
  UCB0BR0 = 0x02;                                                      \
  UCB0BR1 = 0;                                                         \
  MRFI_SPI_CONFIG_PORT();                                              \
  UCB0CTLW0 &= ~UCSWRST;                                               \
)
 
#define MRFI_SPI_IS_INITIALIZED()     (UCB0CTLW0 & UCCKPH)
  • Modify the compile time integrity check to make sure that the code is compiled with the correct board definition from bsp_board_defs.h
MSP-EXP430FG4618 MSP-EXP430FR5739
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#ifndef BSP_BOARD_EXP461x
#error "ERROR: Mismatch between specified board and MRFI configuration."
#endif
/**************************************************************************************************
 *                                  Compile Time Integrity Checks
 **************************************************************************************************
 */
#ifndef BSP_BOARD_EXPFR5739
#error "ERROR: Mismatch between specified board and MRFI configuration."
#endif


Source Code Download

The MSP-EXP430FR5739 SimpliciTI BSP source code can be downloaded here: File:EXP430FR5739.zip.


Porting SimpliciTI to other MSP430 and custom board

Eventough this guide is written only for MSP430FR5739 device on the MSP-EXP430FR5739, it should give the basic idea for porting the stack to other MSP430 devices even the ones on the custom boards. To complete this guide, here are the missing puzzle pieces which can help the porting to other custom platform:

  • Code for setting the device basic configuration such as clock system and MPU unit of the MSP430 FRAM devices can be retrieved from the MSP430 example codes database. For 2xx devices, GRACE software tool also provide possibility to generate the peripheral configuration code. For 5xx codes, the MSP430Ware also provide the possibility to deploy the easy-to-use library.
  • Definitions of LEDs and Push-button are basically application specific and can be omitted if necessary
  • The same online available resources such as the example codes, GRACE, and MSP430Ware mentioned above can be also used as good starting point for the SPI configuration. For the pin configuration, please refer to the device specific datasheet (usually at the end of the document, named as "Pin/Port Schematic") to get information on configuring the GPIO as SPI interface pins.
  • For creating/porting SimpliciTI projects, please refer to the following page.



Porting SimpliciTI to other Non-MSP430 Processors

It is also feasible to port SimpliciTI to other Non-MSP430 Processors. Mostly the steps are the same as described above that all source and header files under $INSTALL_DIR$\Components\bsp\boards, however there is one additional step which needs to be done also when trying to port SimpliciTI to other Non-MSP430 Processors: under $INSTALL_DIR$\Components\bsp\mcus, create one new header files called bsp_<MCU_NAME>_defs.h. This header file shall contain:

  • Definitions of common integer data types such as int8_t, uint8_t, etc. - easiest way to do porting is to include <stdint.h> if the compiler supports C99
  • Necessary platform specific macro functions e.g. for enabling and disabling interrupts, etc.

One good reference for this is the IAR release of SimpliciTI which contains porting on MSP430 architecture as well as 8051 architecture (under $INSTALL_DIR$\Components\bsp\mcus, there are two files. bsp_8051_defs.h and bsp_msp430_defs.h).