OMAP-L1x/C674x/AM1x SOC Architecture and Throughput Overview

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Abstract

This collection of Wiki articles provide information on the OMAP-L1x/C674x/AM1x throughput performance and describe the OMAP-L1x/C674x/AM1x System-on-Chip (SoC) architecture, data path infrastructure, and constraints that affect the throughput and different optimization techniques for optimum system performance. These set of Wiki articles also provide information on the maximum possible throughput performance of different peripherals on the SoC.

SoC Architectural Overview

The OMAP-L1x/C674x/AM1x SoC Architectural Overview page gives a description of the SoC architecture and its components including system masters, slaves, bridges, and switched central resources.

SoC Constraints

Factors such as hardware latency, head of line blocking, reads vs. writes, and memory bandwidth constrain system throughput. For a description of these and other factores see the OMAP-L1x/C674x/AM1x SoC Constraints page. 

SoC Level Optimizations

The techniques that can be implemented at the system level to optimize throughput are described in the OMAP-L1x/C674x/AM1x SoC Level Optimizations page. The pages listed under the IP Throughput Optimization Techniques section describe optimation techniques that can be implemented at the IP or peripheral level.

IP Throughput Optimization Techniques

These Wiki articles describe the throughput performance of different peripherals on OMAP-L1x/C674x/AM1x devices. They also provide the factors that affect peripheral throughput and recommendations for optimum peripheral performance.

In most cases, an EDMA transfer was setup in the background to mimim system activity in a real system.  This background activity is described in EDMA Background Activity for OMAP-L1x/C674x/AM1x Throughput Measurements.

LCD Controller (LCDC)

For a description of the throughput analysis of the LCDC module integrated in OMAP-L1x/C674x/AM1x devices see OMAP-L1x/C674x/AM1x LCD Controller (LCDC) Throughput and Optimization Techniques.

Universal Asynchronous Receiver/Transmitter (UART)

For a description of the throughput analysis of the UART module integrated in OMAP-L1x/C674x/AM1x devices see OMAP-L1x/C674x/AM1x UART Throughput and Optimization Techniques.

Multichannel Audio Serial Port (McASP)

See OMAP-L1x/C674x/AM1x Multichannel Audio Serial Port (McASP) Throughput and Optimization Techniques for a description of the throughtput analysis done on the McASP module included in OMAP-L1x/C674x/AM1x devices.

UPP throughput estimates

Estimates of throughput that can be achieved on UPP are provide on the wiki article: UPP throughput estimates


Overview Training Slides

The following slide sets contain a high level overview of the OMAPL1x/C674x/AM1x SoC Architecture, Constraints and Optimizations.