From Texas Instruments Embedded Processors Wiki

System Setup & Boot

Linux u-Boot

u-boot environment example

bootdelay=3
baudrate=115200
bootfile="uImage"
ethaddr=00:0e:99:##:##:##        
gateway=192.168.1.1
getkernel_tftp=tftpboot 0xC0700000 uImage
bootargs_nfs=mem=32M console=ttyS2,115200n8 root=/dev/nfs nfsroot=192.168.1.2:/home/user/workdir/filesys,nolock rw noinitrd ip=dhcp
bootcmd_nfs=run getkernel_tftp; bootm 0xC0700000
bootargs_sd=mem=32M console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw noinitrd ip=dhcp
ipaddr=192.168.1.15
serverip=192.168.1.2
getkernel_spi=sf probe 0;sf read 0xc0700000 0x1e0000 0x220000
bootcmd_spi=run getkernel_spi; bootm 0xc0700000
bootargs=mem=32M console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw noinitrd ip=dhcp
bootcmd=run getkernel_spi; bootm 0xc0700000
stdin=serial
stdout=serial
stderr=serial
ver=U-Boot 1.3.3 (Feb  5 2009 - 17:25:09)

Only 'bootargs'and 'bootcmd' are active. 'bootargs_xxx' and 'bootcmd_xxx' can be used to easily switch between boot modes. Two modes are shown here:

• NFS boot: kernel and filesystem through remote TFTP/NFS server
• SD boot: kernel from SPI flash, filesystem on SD card

Other options/combinations are of course possible.

Can I use the LCD driver with resolutions greater than QVGA?

The original LCD driver (at least up to PSP 2.20.00.06) does only support resolutions up to QVGA. It is really written and tested only for a single LCD panel that has QVGA resolution. Now for system test and demonstration purposes hardware adapters and necessary software were developed using VGA (640x480) resolution. While this may not work for all systems it has been proven to be generally possible. Latest trials with timing modifications resulted in a working display at 800x600@56Hz.

See the VGA topic for more details.

For technical support on OMAP please post your questions on The OMAP Forum. Please post only comments about the article OMAP-L1x FAQ here.

	Links
	ARM Microcontroller MCU ARM Processor Digital Media Processor Digital Signal Processing Microcontroller MCU Multi Core Processor Ultra Low Power DSP 8 bit Microcontroller MCU 16 bit Microcontroller MCU 32 bit Microcontroller MCU

Comments

I need some help to solve the following two problems:

1. I can receive data from McAsp through peripherial port by CPU polling mode, but I can't read anything through DMA port(RBUSEL=0), why?

 the McAsp configuration is 
 
 MCASP1_GBLCTL=0;		//reset McASP control register
 while(MCASP1_GBLCTL){};

 MCASP1_RFIFOCTL=0;		//reset RFIFO
 MCASP1_RFIFOCTL=0x00000901;	//9 words; 

 MCASP1_RMASK=0x003FFFF;	//
 MCASP1_RFMT=0x0001d190;	//Reads from DMA port;1bit delay；

// MCASP1_RFMT=0x0001d198; //1bit delay；Reads from peripheral configuration port;Rotate right by 0 (no rotation).

 MCASP1_AFSRCTL=0x00000480;	//9 slot TDM;FRWID single bit;Externally frame sync;A rising edge indicate the frame beginning.
 MCASP1_ACLKRCTL=0x00000000;	// 
 MCASP1_AHCLKRCTL=0;		// 
 MCASP1_RTDM=0x000001FF;	//9 slot active
 MCASP1_RINTCTL=0;		//disable interrupt
 MCASP1_RCLKCHK=0;		// 
 MCASP1_SRCTL1=0x00000002;	//use McASP1-1 as receiver
 MCASP1_PFUNC=0;	        //MCASP FUNCTION
 MCASP1_PDIR=0;	        //INPUT
 MCASP1_DITCTL=0;	        //DIT DISABLE
 MCASP1_DLBCTL=0;	        // LOOPBACK DISABLE
 
 MCASP1_RGBLCTL|=0x00000002;	//
 while(!(MCASP1_RGBLCTL&0x00000002)){};
 
 MCASP1_RGBLCTL|=0x00000001;	//external clock
 while(!(MCASP1_RGBLCTL&0x00000001)){};
 
 EDMA_init();		        //startDMA，
 
 MCASP1_RSTAT=0xffffffff;	//clear receive status register
 MCASP1_RGBLCTL|=0x00000004;	//activate serializer
 while(!(MCASP1_RGBLCTL&0x00000004)){};
 
 MCASP1_RGBLCTL|=0x00000008;	//start McASP 
 while(!(MCASP1_RGBLCTL&0x00000008)){};
 
 MCASP1_RGBLCTL|=0x00000010;	//release frame sync generator
 while(!(MCASP1_RGBLCTL&0x00000010)){};

2.I can't use EDMA to service McAsp, the configuration is as below:

EDMA3PaRAM2_OPT=0x00000201;       //1D-1D Transfer with A-syncronization
EDMA3PaRAM2_SRC=0x01D04284;       //source address：MCASP1_RBUF1
EDMA3PaRAM2_A_B_CNT=0x00400024;   //BCNT=40;ACNT=36
EDMA3PaRAM2_DST=0x11800000;       //destination：DSP L2RAM
EDMA3PaRAM2_SRC_DST_BIDX=0x00240000;
EDMA3PaRAM2_LINK_BCNTRLD=0x0024FFFF;
EDMA3PaRAM2_SRC_DST_CIDX=0x00000000;
EDMA3PaRAM2_CCNT=0x00000003;     //CCNT=3

/*EDMA3PaRAM2 configuration complete*/

EDMA3CC_EESR=0x00000004; //enable EDMA_EVENT_2(start EDMA)

could someone tell me why? I really need your help, thank you

Karrzhan said ...

   At present I have a OMAP-L137 UI board,64M ram, 128M nand flash,I use uboot to boot the kernel ,when i configure the kernel to support Grouphic LCD,then the MTD can not be used,I want to use the MTD and Grouphic LCD at the same time,How can I do to make it out? Is there a complict between the LCD pins and Nandflash pins ,is this the reasion that can not support the LCD&MTD at the same time? 

 Wait for your answer！Thanks very much!