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Optimization Techniques for the TI C6000 Compiler

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This page links to optimization resources that contain the key techniques used to obtain the best performance from the TI C6000 Code Generation Tools.

Introduction to C6000 DSP Optimization

C6000 Optimization Workshop and Materials

  • TMS320C6000 DSP Optimization Workshop
    • The workshop materials on this page show a user how to optimize their high-level C code for the TMS320C6000 DSP.
    • Scroll down to "Workshop Materials"

c64, c64Plus Compiler Overview

  • C64plus_cgt_overview.pdf‎
    • Compact instructions, sploop, trampolines, performance/codesize data for c64x+ and a very brief splattering of tuning tips

c64, c64Plus Optimization Techniques

  • C64p_cgt_optimization.pdf‎
    • Selecting the right build options
    • Also adds intermediate/advanced techniques for optimizing structure accesses, using restrict with structures and new examples.
    • Examples use cgt version 6.0.x.
    • Good data on control code optimizations

Hand-Tuning Loops and Control Code on the TMS320C6000

  • Detailed Application Report
    • The TMS320C6000 compiler automatically performs a great deal of performance-related tuning. This compiler-driven optimization usually suffices. For the occasional cases where additional CPU performance is needed, this application report presents strategies and examples for improving performance of C/C++ applications. Memory-related performance improvements (such as background DMA transfers or cache usage) are outside the scope of this report. The techniques apply to all members of the C6000 architecture family.
    • The target audience is intermediate to advanced application developers. Familiarity with the C6000 architecture and experience developing code for this architecture is assumed.

Tuning Software Pipelined Loops

C6000 Programmer's Guide

Performance Tuning with the "Restrict" Keyword