PDK/PDK TDA Release Notes

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PDK TDA Version 01.09.00

Release Notes
4th April 2018

Important Note

This release is for TDA3xx, TDA2Px, TDA2xx, TDA2Ex and TDA2Ex 17x17 platforms.

Introduction

This release notes provides important information that will assist you in using the PDK software package. This document provides the product information and known issues that are specific to the PDK software package.

New in this Release

  • CSL ECC
    • PDK-2153: Added support for ECC RMW(Read Modify Write) in ECC CSL-FL and Diagnostic Library for TDA2Px.
    • PDK-2154: Added support for DSP L1P tag, L1D tag and L2 tag parity in ECC CSL-FL for TDA2Px.
  • SBL
    • PDK-2152: Added support for 666MHz DDR frequency configuration for TDA2Px.
    • PDK-2155: Added support for all DM(Data Manual version C) frequencies in TDA2Px SBL.
  • PM
    • PDK-2156: Added support for ABE fractional divider configuration for Audio applications for TDA2Px.
    • PDK-2157: Added support to control loop BW to reduce/control the jitter characteristics of PCLK.
  • CAL
    • PDK-2212: Added support for notification on the nth line and End of the frame.
  • L3 Firewall Library
    • PDK-2158: Added support for mReqDomain ID configuration for L3 masters for TDA2Px.
  • Bug Fixes (Refer Fixed in this Release section)

Installation and Usage

Installation and Usage of the PDK package could be found at PDK Software Developer Guide

Upgrade and Compatibility Information

  • Build
    • Variables in packages/ti/build/Rules.make are changed to reflect the tool version path as installed in PROCESSOR-SDK-VISION.
      • User need to just change the SDK_INSTALL_PATH path to build PDK. Any further change in the tools path can be done by modifying the variables under ifeq ($(BOARD),$(filter $(BOARD), $(BOARD_LIST_J6_TDA))) sections.
  • VPS Examples Utility
    • VPS example utility is EVM dependent. Hence the generated library is in placed in vps/lib/<BOARD>/ instead of vps/lib/<SOC>/ folder
    • PDK-2216: Incorrect CAL_CSI2_CTX register address is calculated when two csi2 phy instance is used
      • Behaviour changes for APIs 'BspUtils_appInitUb960 ()' and 'BspUtils_appDeInitUb960 ()':
        • Supports multiple instances of UB960 simultaneously. The argument “instId” uniquely identifies the instance of UB960. Has been tested with 2 instances of UB960. By configuring instId as 0x0, the functionality is backward compatible. In older implementation “instId” was being ignored.
      • Interface changes for APIs 'BspUtils_appInitUB913Ser ()' and 'BspUtils_appDeInitUB913Ser ()':
        • Function argument “instId” has been added. This change allows to uniquely identify serailizer connected to the instance of UB960. If only 1 instance of UB960 is used, set this parameter to 0x0.

Dependencies

This release requires following tools/packages to be installed.

  • Code Composer Studio Version: CCS 5.4, CCS 5.5, CCS 6 or CCS 7
  • XDC Tools Version: 3.32.01.22_core
  • BIOS Version: 6.46.04.53
  • CG Tool (TMS470) Version: 16.9.2.LTS
  • CG Tool (C6000) Version: 7.4.2
  • CG Tool (ARP32) Version: 1.0.7
  • GCC Tool (Linaro) Version: 4.9-2015q3
  • EDMA LLD: 02.12.00.20
  • MMWAVE DFP: 01.00.00.01 (Only for AR1xx Radar)
  • MSHIELD DK: 4.5.3 (Only for TDA2xx HS build)

Devices Supported

  • TDA3xx PG1.0, PG2.0
  • TDA2xx PG1.0, PG1.1, PG2.0
  • TDA2Px PG1.0
  • TDA2Ex PG1.0, PG2.0
  • TDA2Ex_17x17 PG1.0

Application Boards Supported

  • Base Board
    • TDA3xx Base EVM
    • TDA2xx Base EVM
    • TDA2Px Base EVM
    • TDA2Ex Base EVM
    • TDA2Ex 17x17 Base EVM
  • Daughter Board
    • LCD board (480P, 720P, 1080P)
    • TDA3xx Multi-deserializer board
    • TDA3xx UB960 EVM
    • TDA3xx RVP board
    • TDA2xx/TDA2Ex/TDA2Px Vision application board
    • TDA2xx/TDA2Ex/TDA2Px Vision application board with Multi-deserializer board
    • TDA2xx/TDA2Ex/TDA2Px JAMR3 application board

What is Supported

  • CSL:
    • UART, I2C, GPIO, McASP, McSPI, QSPI, PWM
    • Mailbox, Spinlock, EDMA, OCMC, MMU, Timer
    • MMCSD, PCIe, GPMC
    • DCAN, MCAN
    • RTI, CRC, ESM, ADC, DCC, L3FW, L4FW, WDTimer
    • UNICACHE, AMMU, CACHE_A15, MMU_A15, IPU ECC, MPU L2 RAM ECC, C66x XMU, C66x MPU
  • VPS Drivers:
    • VIP Capture
    • VPE M2M
    • DSS Display
    • DSS Capture Writeback
    • DSS M2M Writeback
    • CAL Capture
    • ISS M2M
    • ISS M2M SIMCOP
  • Secondary Bootloader (SBL)
    • SBL Library
    • SBL Utility Library
    • QSPI Flash Library
    • NOR Flash Library
    • SBL Application
  • BSP LLD (GIO/IOM drivers): UART, McSPI, I2C
  • STW LLD: FATLIB, I2C LLD, UART console
  • PM: PMHAL, PMLIB
  • IPC LITE Library
  • L3/L4 Firewall Library
  • Diagnostics Library

Features

For details on features, refer to PDK_Requirement_to_Test_Traceability_Report.xlsx under <PDK_INSTALL>/docs/traceability folder.

Supported/Validated Examples

For details on supported/validated examples, refer to test report of each platform under <PDK_INSTALL>/docs/test_report/<platform> folder.

Fixed in this Release

Fixed in this Release
ID Headline Module Affected Versions Affected Platforms Patch Location
PDK-2393 [CAL] Frame Widths unaligned to 64 bits will be cropped to 64 bits. Last few bytes are lost VPS CAL Driver PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA3xx and TDA2Px
PDK-2216 Incorrect CAL_CSI2_CTX register address is calculated when two csi2 phy instance is used VPS CAL Driver PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA3xx and TDA2Px
PDK-2217 [VIP] driver create fails for 5 channels for TDA2Ex VPS VIP Driver PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA2Ex <pdk_install_path>/docs/patch/vip/PDK-2217
PDK-2149 [RADAR] CSI out Height should consider max of advanced frame sub frames VPS RADAR PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA3xx
PDK-2147 Host invokes Get device version without checking the state of last CMD API. VPS RADAR PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA3xx
PDK-2340 [pm] set post div fails for post dividers instantiated in control module PM PDK_TDA_01.08.01 TDA2Px
PDK-2134 [PM] Enable Dual Clock out from Video PLL PM PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA2xx and TDA2Px
PDK-2221 [McSPI] Rx DMA channel allocation failure not returned to application McSPI Driver PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA2xx, TDA3xx, TDA2Ex and TDA2Px
PDK-2219 A15's vector table address is hard coded in CSL library CSL PDK_TDA_01.07.00, PDK_TDA_01.08.00, PDK_TDA_01.08.01 TDA2xx, TDA2Ex and TDA2Px

Known Issues

Known Issues
ID Headline Module Reported in Release Affected Platforms Workaround in this release
PDK-2394 Video DPLL settings are incorrect for OPP High PM PDK_TDA_01.09.00 TDA3xx This will be fixed in next release as the bug was reported late in the release cycle.
PDK-2136 Pixel Corruption for 12bit MIPI format VPS CAL Driver PDK_TDA_01.09.00 TDA3xx and TDA2Px Under Debug with HW Team.
PDK-2107 [1/5 times] Black screen seen with HDMI capture using ADV7611 VPS VIP Driver PDK_TDA_01.08.01 TDA2xx, TDA2Ex, TDA2Px Suspected to be ADV EDID programming issue. Restarting the usecase works fine.
PDP-935 After POR, HDMI Capture fails on ADV vision app board with laptop HDMI input VPS VIP BSP_01.05.00 TDA2xx, TDA2Ex, TDA2Px, TDA3xx Disconnect and connect the HDMI cable again after power on reset.
PDK-2075 DSS M2M writeback crop not working on TDA3xx VPS DSS M2M driver PDK_TDA_01.08.00 TDA3xx Write the full frame in the WB path. Note: TDA2xx/TDA2Ex/TDA2Px DSS doesn't support cropping in WB path
PDP-1425 DSS M2M: YUV422I 1080P input downscaled to YUV420SP 720P on write-back path not working VPS DSS M2M driver BSP_01.07.03 TDA2xx, TDA2Ex, TDA2Px, TDA3xx Use the scalar in the input pipeline and do 1x scaling in the write-back path
PDP-1402 DSS M2M driver with input pipe from GRPX not working VPS DSS M2M driver BSP_01.07.03 TDA2xx, TDA2Ex, TDA2Px Use video pipeline as video pipeline also supports RGB input format

Known Limitations

VIP Capture Driver

  • In case of ADV7611 HDMI in capture, first few frames in the first run after power cycle might have artifacts. This is because when the ADV7611 is configured, it programs the internal EDID for 1080p60 and does Hot Plug Assert (HPA). When this happens the video source will read the EDID and reconfigure itself for the new timing. At this time the video might be corrupted.
  • In TDA2xx/TDA2Ex, HDMI capture from SIL9127 is not supported when Multi-serdes board is connected to VISION daughter card. This is because of the I2C address conflict between SIL9127 and the deserializer (This is a board limitation).
  • 24-bit RAW capture - No support in EVM
  • RGB888 input to VIP - No support in EVM
  • Various discrete sync modes except HSYNC/VSYNC mode - No support in EVM
  • In case of dual output streams from same capture source, below limitations applies
    • YUV422SP output should always be stream 0 (first stream)
    • For YUV422I scaled and YUV420SP non-scaled outputs, YUV422I scaled output should always be stream 0 (first stream)
    • Scaled outputs on both the streams are not supported

DSS Display Driver

  • In TDA3xx SD Venc writeback in RGB format could result in extra bytes write, Below is the explaination for the same and the driver configuration parameters to handle this.
    • With the implementation of the errata i873, where venc size is increased by 2 pixels, and fwd pipe position is also shifted by 2 pixels while programming the DSS registers.
    • With following change in input parameter extra bytes will not be written.
      • Driver takes the overlay size as an input parameter. It should be given as 722 (insted of 720) in case of SD Venc writeback for NTSC or PAL format (with 2 extra pixels per line).
        Vps_CaptDssWbParams->inFmt.width = 722;
      • Following are the three options for writeback and the driver config parameters:
        1. Do not scale the image and writeback 722 pixels per line; This will have first 2 blank pixels and 720 actual video pixels. App should allocate buffer for 722 pixels per line.
        Vps_CaptDssWbParams->outStreamInfo[0].outFmt.width = 722;
        Vps_CaptDssWbParams->inCropCfg.cropHeight = 722;
        2. Scale the writeback buffer; 2 blank + 720 actual video pixels scaled to total 720 pixels in written back buffer. App should allocate buffer for 720 pixels per line.
        Vps_CaptDssWbParams->outStreamInfo[0].outFmt.width = 720;
        Vps_CaptDssWbParams->inCropCfg.cropHeight = 722;
        3. Use region based writeback to crop the image from 2 to 722 pixels per line from overlay. App should allocate 720 pixels per line and writeback without any blank pixels.
        Vps_CaptDssWbParams->outStreamInfo[0].outFmt.width = 720;
        Vps_CaptDssWbParams->inCropCfg.cropHeight = 720;
        Vps_CaptDssWbParams->outStreamInfo[0].cropEnable = TRUE;
  • The region based writeback on TDA3xx has few limitation like writing extra bytes or drop in writeback frame rate.
    Please refer the VPS Display Driver UserGuide.

Serial Drivers

  • When UART driver’s configuration is in interrupt mode and when the RX buffer size is bigger than FIFO size and when UART driver receives data of same length as FIFO size, the GIO_read function does not return until it receives next data due to H/W specification as given below. To workaround this limitation, RX FIFO size and RX buffer size needs to configured as same length.
    • As per the UART IP (given in TRM section 24.3.4.8.1.3.7.1 Time-out Counter), when there is a break in the continuous UART character received, it will timeout so that the driver can read the last bytes out of the UART FIFO when the bytes received is less that the FIFO threshold. In the above case, since the user has given (Receive data size == FIFO threshold), the driver get the FIFO threshold interrupt instead of timeout interrupt. And the driver reads this out of the FIFO before the UART IP times out. Since this is not a timeout, the driver will wait for few more bytes (since RX size is greater than FIFO size) and doesn’t return with timeout.
  • UART single byte transfer is supported in polled/interrupt Mode and not in DMA Mode
  • Junk characters are observed in the UART terminal whenever we do reset on the board. This is present in TDA3xx-EVM only.

ISS Driver

OV10640 Sensor Drivers
  • On some TDA3xx EVMs, I2C register write for the OV10640 sensor is failing at 400KHz I2C frequency. In this case, change the I2C frequency to 100KHz in gBoardTda3xxI2cInstData[1].busClkKHz in packages/ti/drv/vps/src/boards/src/bsp_boardTda3xx.c file.

diff --git a/packages/ti/drv/vps/src/boards/src/bsp_boardTda3xx.c b/packages/ti/drv/vps/src/boards/src/boarindex
--- a/packages/ti/drv/vps/src/boards/src/bsp_boardTda3xx.c
+++ b/packages/ti/drv/vps/src/boards/src/bsp_boardTda3xx.c
@@ -281,7 +281,7 @@ static Bsp_BoardI2cInstData gBoardTda3xxI2cInstData[] =
        BSP_DEVICE_I2C_INST_ID_1,           /* instId */
        SOC_I2C2_BASE,                      /* baseAddr */
        CSL_INTC_EVENTID_I2CINT2,           /* intNum */
-       400U                                /* busClkKHz */
+       100U                                /* busClkKHz */
    }
};

  • I2C transaction fails on address 0x33 for some of the OV10640 Parallel sensor. In this case, change the I2C address to 0x31 for the macro BOARD_OV10640_I2C_ADDR_CPI in the file packages/ti/drv/vps/src/boards/src/bsp_boardPriv.h
  • Please refer "User Guide" that came with this release, for EVM modifications required for I2C
Sensor Tuning
  • Tuning the sensor is beyond the scope of this product. An higher level software (such as SDK) will have to tune sensor for the required quality.
  • Quality of the sensor (and/or processing) should not be judged based on the ISS demo applications.

Validation Information

  • This release is validated on TDA2xx, TDA2Px, TDA2Ex/TDA2Ex 17x17 and TDA3xx EVM for the above mentioned components

Technical Support and Product Updates

For further information or to report any problems, contact http://e2e.ti.com or http://community.ti.com or http://support.ti.com.

Archived