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PRUSS Memory Map

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This article is part of a collection of articles describing the PRU subsystem included in OMAP-L1x8/C674m/AM18xx devices (where m is an even number).  To navigate to the main page for the PRU subsystem click on the link above.

Local Memory Map

The PRUSS comprises various distinct addressable regions. Externally the subsystem presents a single 64Kbyte range of addresses. The internal interconnect bus (also called switched central resource, or SCR) of the PRUSS decodes accesses for each of the individual regions. The PRUSS memory map is documented in Table 1 (Instruction Space) and in Table 2 (Data Space). Note that these two memory maps are implemented inside the PRUSS and are local to the components of the PRUSS.

Local Instruction Memory Map

Table 1 – Local Instruction Space Memory Map
Start Address End Address PRU0 PRU1
0x00000000 0x00000FFF PRU0 Instruction RAM PRU1 Instruction RAM

Local Data Memory Map

Table 2 – Local Data Space Memory Map
Start Address End Address PRU0 PRU1
0x00000000 0x000001FF Data RAM 0* Data RAM 1*
0x00000200 0x00001FFF Reserved Reserved
0x00002000 0x000021FF Data RAM 1* Data RAM 0*
0x00002200 0x00003FFF Reserved Reserved
0x00004000 0x00006FFF INTC Registers INTC Registers
0x00007000 0x000077FF PRU0 Registers PRU0 Registers
0x00007800 0x00007FFF PRU1 Registers PRU1 Registers
0x00008000 0x0000FFFF Reserved Reserved
0x00010000 0xFFFFFFFF Reserved Reserved
*Note that PRU0 accesses Data RAM0 at address 0x00000000, also PRU1 accesses Data RAM1 at address 0x00000000. Data RAM0 is intended to be the primary data memory for PRU0 and Data RAM1 is intended to be the primary data memory for PRU1. However for passing information between PRUs, each PRU can access the data ram of the other PRU at address 0x00002000.

Global Memory Map

The global view of the PRUSS internal memories and control ports is documented in Table 3. The offset addresses of each region are implemented inside the PRUSS but the global device memory mapping places the PRUSS slave port in the address range 0x01C30000-0x01C3FFFF. The PRU0 and PRU1 can use either the local or global addresses to access their internal memories, but using the local addresses will provide access time several cycles faster than using the global addresses. This is because when accessing via the global address the access needs to be routed through the switch fabric outside PRUSS and back in through the PRUSS slave port.

Table 3 – Subsystem Global Memory Map
Start Address End Address Region
0x01C30000 0x01C301FF Data RAM 0
0x01C30200 0x01C31FFF Reserved
0x01C32000 0x01C321FF Data RAM 1
0x01C32200 0x01C33FFF Reserved
0x01C34000 0x01C36FFF INTC Registers
0x01C37000 0x01C377FF PRU0 Registers
0x01C37800 0x01C37FFF PRU1 Registers
0x01C38000 0x01C38FFF PRU0 Instruction RAM
0x01C39000 0x01C3BFFF Reserved
0x01C3C000 0x01C3CFFF PRU1 Instruction RAM
0x01C3D000 0x01C3FFFF Reserved

Each of the PRUs can access the rest of the device memory (including memory mapped peripheral and configuration registers) using the global memory space addresses. Please refer to the device's System Reference Guide or datasheet for device specific memory mapping.

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