Pin Mux Utility for ARM MPU Processors

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PinMux Tool v4 is the recommended version for Sitara processors. It is available from the Cloud Tools Portal.

A getting started video, list of devices supported, and tool overview can be found in the PinMux Tool v4 User's Guide.This page includes supplemental information specific to Sitara ARM Processors.


The TI PinMux Tool is a Cloud, Windows, or Linux-based software tool for configuring pin multiplexing settings and I/O cell characteristics for TI Processors. Pin multiplexing controls the routing of internal signals to the external balls of the device while the I/O cell characteristics include enabling of internal pull-up / pull-down resistors. The Pin Mux Tool provides a graphical user interface for selecting the peripheral interfaces that will be used in the system design. Its intelligent solver atomatically selects pin combinations that help the designer make sure there are no multiplexing conflicts. All selections and settings can be saved as a pinmux design file which can be reloaded later.


NOTE: Although these utilities are tested and intended to be accurate, they are provided ‘as is’ and are not guaranteed to provide accurate results. In the event of a conflict between the device data contained in this software tool and the device datasheet, the datasheet shall take precedence. Please check configuration results against the datasheet for your device to be assured your pinmux configuration is possible and accurate. It is up to the user to verify all of the bits in the registers based on the information in the device datasheet and that all IOSETs selected by the tool are valid and supported. Although we try to maintain backwards compatibility between PinMux Tool versions it isn't guarunteed.

Software User's Guide

A quick overview of the TI PinMux Tool's UI and usage is available on the main PinMux Tool Wiki. The rest of this guide will focus on usage for the Sitara Processors.

Release Notes

TI PinMux Tool Release Notes

Application Launch

At launch the tool will present the option to start a new design or to open an existing design. To start a new design use the drop-down menu indicating which devices are supported by this installation of the PinMux Tool. Select your device and click Start. Previously saved designs can be opened too. Although we try to maintain backwards compatibility between PinMux Tool versions it isn't guarunteed.


Timing restrictions make the concept of IOSETs an important subject for Sitara Processors. The device datasheet timing specifications define the relationship between clock lines and data lines. A peripheral instance like McASP may be available on any number of pins but not all combinations of clock and data pins may be available. We only define IOSETs for combinations of pins that are guarunteed to meet the datasheet timing requirements. Pin conflict errors will be raised if the remaining available pins don't come together to build an IOSET or if pins are manually selected that don't match a defined IOSET. This is why it is important to start your system design with the PinMux Tool first before any schematic or board design is started.

Use Cases

Some peripherals may expose Use Cases to allow you to quickly eliminate the signals you won't need.

Power Domain Checking

Some devices support dual-voltage inputs on the IO pins (VDDSHVx). The PinMux Tool is capable of tracking the IO power supply domains of an SoC and allows you to select which voltage is applied on the dual-voltage IO rails. With this information the PinMux Tool can raise a voltage conflict warning if a peripheral's IO requires a different voltage than is applied to the dual-voltage IO rail.

Example: On the AM57xx pin B14 is supplied by VDDSHV3. If gpio5_0 is used on this pin, the IO will be either 1.8V or 3.3V depending on the supply level applied to VDDSHV3. Damage may occur to the SoC pin if a 3.3V signal was driven into gpio5_0 while it is operating at 1.8V.

Changing Pad Configuration Parameters

Pad configuration parameters are used to set the values of other bit fields in each Pad Configuration Register. The parameters are typically for internal resistor pull and a check box for enabling receive functionality. These configuration parameters are SoC specific and may vary.

Output File Formats

Code files generated by the PinMux Tool vary by each device and its requirements. They generally include C code for Processor SDK RTOS which should be drop-in compatibile with the PDK Board Library. Reference the Processor SDK RTOS Board Support page for more details. A partial devicetree format is generated for Processor SDK Linux and that should be manually patched into the reference devicetree file included with the Linux kernel.

Some devices will have a generic format that is intended for use with U-boot. These devices require pin multiplexing to be done once, in isolation, and while executing from SRAM. U-boot takes care of this by applying pin configurations while the MLO file (secondary bootloader) executes from OCMC RAM. This guide will include how to convert the generic format for U-boot.

Processor SDK RTOS

Starterware (Legacy)

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Modifications to the file name and data structures might be required.

Platform Development Kit

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Processor SDK Linux


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For generic format, a perl script is needed.


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Pin Mux Utility v2.4.1 User's Guide
Pin Mux Utility v1.x User's Guide
Sitara Linux SDK