Processor SDK RTOS Migration Guide

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External Link: http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_Migration_Guide


RTOS Software Developer Guide Migration Guide




NOTE

This Migration Guide is for the latest Processor SDK RTOS release. If you are using an older release, see the Archived Section below.


Overview

This page covers migration information for applications built on top of the last Processor SDK for RTOS release.


Processor SDK RTOS 04.01.00

General

Common CSL Library

Migration: Limited to Bare metal Application and Keystone SoCs such as K2HK/K2LE /K2G. No change required for other SoCs such as AM571x/AM572x/C6678/C6657.

Additional Details: Default start address for the vectors modified to beginning of MSMCSRAM (0x0C000000) compared to previous release end of the MSMC. This matches to both secured and non secured devices Application is required to reserve (0x0C000000 to 0x0C000040) size 0x40 bytes .

Bare metal Application needs to reserve this location for vectors when using CSL startup library. There is still option for overriding default configuration by defining vector_base to desired start address: Example: if the vector location desired is say 0xC0E0000, then add below line in the application's linker command file:

__vector_base__= 0xC0E0000;

No change needed for application using default configuration matching CSL

ICSS_EMAC Library

Migration: Optional. No migration required for applications using default icss_dualemac and icss_switch firmware .

The location of icss_emacFwConfig.c/.h has moved from ti/drv/icss_emac/firmware/<SOC_TYPE> directory to ti/drv/icss_emac/firmware/icss_dualemac/config/ directory. If applications are compiled with icss_emacFwConfig.c, please update your build/make infrastructure.

Archived