Talk:SD-MMC Usage Notes on OMAP35x and AM37x

Comments on SD-MMC Usage Notes on OMAP35x and AM37x -

Dvescovi said ...
I find it hard to believe the default state for SDHC2 "expects" external translation (i.e. clkin). I would expect booting from eMMC parts on SDHC2. These devices have 1.8v I/O interface and usually full 8 (or 4) bit data paths.

--Dvescovi 12:12, 1 February 2011 (CST)

BradGriffis said ...
Dvescovi -- the answer is different depending on the boot mode... When booting from MMC2 the boot ROM sets CONTROL_DEVCONF.MMCSDIO2ADPCLKISEL=1, i.e. no translation logic expected/allowed (i.e. native 1.8V boot). When using other boot modes the boot ROM does not touch CONTROL_DEVCONF and hence you are required to write CONTROL_DEVCONF.MMCSDIO2ADPCLKISEL=1 if you are not using level shifters. Both cases were covered in the wiki page...

--BradGriffis 11:41, 31 October 2011 (CDT)

Kkuemmerle said ...
I found this note in the 3530 TRM pg 846.

NOTE: If MMC1_VDDS (or SIM_VDDS) is supplied before the device reset is released, the voltage must be 3 V. It is not recommended to supply the vdds_mmc1 (or vdds_sim) pad with 1.8 V unless software has configured the PBIAS cells accordingly.

Does this cause any damage or unrecoverable error. I would like to power up with MMC1_VDDS tied to VDDS (1.8V) as indicated in this note on page 849.

These timing requirements apply only when MMC1_VDDS/SIM_VDDS is 3.0 V. If MMC1_VDDS/SIM_VDDS is 1.8 V, VDDS and MMC1_VDDS/SIM_VDDS can be ramped up simultaneously.

--Kkuemmerle 15:36, 19 February 2013 (CST)