AM35x High-End CAN Controller (HECC)

'''  Content is no longer maintained and is being kept for reference only! ''' This page provides information about the controller area network (CAN). CAN is a protocol for communicating with other controllers in harsh enivornments. Both the Standard CAN Controller (SCC) and High-End CAN Controller (HECC) modules are described here.

For more information, see section 6.6.6 of the Data Sheet for timing requirements and switching characteristics, and chapter 23 of the Technical Reference Manual (TRM).

Functional Features

 * CAN, version 2.0B compliant
 * 32 RX/TX message objects
 * 32 receive identifier masks
 * Programmable wake-up on bus activity
 * Programmable interrupt scheme
 * Automatic reply to a remote request
 * Automatic re-transmission in case of error or loss of arbitration
 * Protection against reception of a new message
 * 32-bit time stamp
 * Local network time counter
 * Programmable priority register for each message
 * Programmable transmission and reception time-out
 * HECC/SCC mode of operation
 * Standard-Extended Identifier
 * Self-test mode

SEC vs. HECC
The CAN controller is available in both Standard Can controller (SCC) and High-End CAN controller (HECC) implementations.

CAN Controller Overview

 * CPK
 * The Can Protocol Kernel (CPK) serves two functions:


 * 1) Decode messages from the CAN bus and transfer them to the receive buffer
 * 2) Transmit messages onto the CAN bus
 * Message Controller
 * The message controller has two functions:


 * 1) Determine if a message from the CAN bus should be used by the CPU
 * 2) Send the next transmit message to the CPK

Block Diagram
Here is an example connecting the proccessor to a CAN transceiver.



Scehmatic

 * You can find schematics for the EVM from LogicPD's site after creating an account and registering your board.
 * Refer to the schematic review checklist when implementing your own design.

Pull-Up/Pull-Down Recommendations
Refer to the CAN transceiver's data sheet for pull-up and pull-down recommendations. The EVM uses the SN65HVDA540.

Symbols, Footprints, and Simulation Models

 * The OrCad Symbols can be found here.
 * The Allegro foorptrints can be found here.
 * The BSDL simulation model can be found here.
 * The IBIS simulation model can be found here.

Software Design Support

 * Linux
 * Information on the Linux driver can be found here.


 * BSL
 * Some example code can be found from the BSL provided by logic PD. The BSL contains drivers and test code located in the tests\evm\can directory.  Refer to the instructions foud in Doxygen\html\index.html for building and running the test.

FAQ

 * Can the HECC be used in SCC-compatible mode?
 * Yes. In this mode, functions specific to the HECC are not available.  This mode is selected with the SCM bit in the master control register (CANMC).


 * Does the device have a CAN transceiver or just a controller?
 * There is no integrated CAN transceiver. Its just a CAN controller, so it would need to be connected to an external Transceiver like the ISO1050.


 * Why must the CAN module receive an acknowledgement when transmitting a message?
 * Without receiving an acknowledgement, the module will continuously transmit until finally the error counter overflows and the module goes into bus off state.


 * If a CAN module is being used in non-self-test mode, there should be at least one more CAN module on the network, configured for the same bit rate. The other CAN module doesn't need to be configured to receive messages from the transmitting node, but it should be configured for the same bit rate. This is because, a transmitting CAN module expects at least one node in the CAN network to acknowledge the proper reception of a transmitted message. And any CAN node that received a message will acknowledge, irrespective of whether it has been configured to store the received message or not.


 * The requirement of another node does not exist for the self-test mode (if the device peripheral has this feature). In this mode, a transmitting node generates its own acknowledge signal. The only requirement is that the node is configured for any valid bit-rate. i.e. the bit timing registers should not contain a value that is not permitted by the CAN protocol.


 * What types of interrupts are available for CAN?
 * There are two types of interrupts - mailbox interrupts and system interrupts.
 * Mailbox interrupts
 * – Message reception interrupt: a message was received
 * – Message transmission interrupt: a message was transmitted successfully
 * – Abort-acknowledge interrupt: a sent transmission was aborted
 * – Receive-message-lost interrupt: an old message was overwritten by a new message
 * – Message alarm interrupt (HECC only): one of the messages was not transmitted or received within a predefined time frame
 * System interrupts
 * – Write-denied interrupt: the CPU tried to write to a mailbox but was not allowed to
 * – Wake-up interrupt: this interrupt is generated after a wake up
 * – Bus-off interrupt: the CAN module enters the bus-off state
 * – Error-passive interrupt: the CAN module enters the error-passive mode
 * – Warning level interrupt: one or both error counters are greater than or equal to 96
 * – Time counter overflow interrupt (HECC only): the local network time stamp counter had an overflow


 * Is it possible to power down the CAN module?
 * Yes, this can be down locally or globally. The global power-down mode is performed by teh CPU and all clocks are stopped.  With a local power-down, only the CAN module's internal clock is deactivated and this is done by the module itself.

Useful Links
Sitara ARM Microprocessors forum - find more information and ask questions.

Schematic Review Checklist