Template:C674x Hardware

Hardware Information
Overview Power Consumption Performance Device Boot Peripherals Programmable Real-Time Unit Complementary Products
 * C6000 Single Core
 * C6000 Single Core
 * Documentation Overview
 * C674x-OMAPL1x Introductory Information
 * C674x SoC Architectural Overview
 * C674x SoC Constraints
 * C6457 Improvements Over C6455
 * C64x+
 * Schematic Review Checklist
 * C6747 Power Consumption Summary
 * C6748 Power Consumption Summary
 * C674x SoC Architecture and Throughput Overview
 * C674x SoC Level Optimizations
 * EDMA Background Activity for Throughput Measurements
 * C674x LCD Controller (LCDC) Throughput Measurements
 * C674x Multichannel Audio Serial Port (McASP) Throughput and Optimization Techniques
 * PCI Throughput on C64x+ DSPs
 * C674x UART Throughput and Optimization Techniques
 * Basic Secure Boot
 * Determining Compatability between ROM Bootloader (RBL) and Raw NAND Devices
 * List of NAND devices supported by TI RBLs
 * Managed NAND
 * Using the D800K001 Bootloader in SPI Slave Mode
 * C674x Crystal and PLL Frequencies
 * Configuring GPIO EDMA Events
 * Configuring GPIO Interrupts
 * Connecting NOR Flash
 * Introduction to Universal Parallel Port (uPP)
 * McASP Tips
 * Using SPI Chip Select Pin on C674x
 * Programming Asynchronous EMIF
 * Programming EDMA without EMDA3LLD package
 * Programming mDDR/DDR2 EMIF
 * Programming PLL Controllers on C6747
 * Programming PLL Controllers on C6748
 * Programmable Realtime Unit (PRU)
 * PRU Subsystem (PRUSS)
 * PRU Interrupt Controller
 * PRUSS Memory Map
 * Analog and Power for C6455
 * C6748 Complementary Products