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CC256x System Design Guide
- 1 Introduction
- 2 Required Interfacing
- 2.1 Power Supply
- 2.2 Clocks
- 2.3 nSHUTD
- 2.4 Host Controller Interface
- 2.5 PCM/I2S Interface
- 2.6 Voltage Levels
- 2.7 Bluetooth RF I/O
Welcome to the CC256x Hardware System Design Guide. This page describes how to use TI's CC256x Bluetooth family of devices and how to interface our CC256x devices and modules from a systems perspective. Among the things discussed is how to interface the host to the CC256x controller, supply the power, provide the clocks, and adding an antenna.
|Power Supply||→||Clocks||→||nSHUTD||→||Host Controller Interface||→||PCM/I2S Interface||→||Bluetooth RF I/O|
For any discrepencies found on this page, the CC256x datasheet takes precedence over this guide.
This guide is intended for customers that are using the CC256x modules and devices. This guide states hardware interfacing requirements and provides several options for implementing custom designs. The following is NOT the objective of this wiki:
Instead the page will provide systems level interfacing techniques that aims to reduce design time and minimize errors.
This page WILL cover interfacing techniques for users incorporating the following CC256x modules in their design:
- CC2564MODN design
- TI's CC256x QFN design
- LSR's module
- Murata's Class 1 module
- Panasonic's PAN1323 module
For the host, we use the MSP430 as an example. The user is free to use any MPU/CPU for the host as long as it meets the required hardware interfaces. For modular based designs, please take into consideration the interfaces that are already incorporated into the module.
|bps||bits per second|
|HCI||Host Controller Interface|
|SIG||Special Interest Group|
The following links will be frequently referred to in this guide:
The following interfaces must be provided to the CC256x:
- Host Controller Interface through H4 UART
- Clocks (32KHz & 26 MHz)
- Power (1.8V & 3.3V)
- Antenna propagation
The CC256x requires two different power supplies: VDD_IO to power the input/outputs at 1.8V and VDD_IN to power the CC256x Bluetooth core at around 3.6V. If the MCU such as the MSP430 is only 3.3V compatible,
the CC256x can share the 3.3V(range is 2.2 - 4.8 V) power supply for VDD_IN. For VDD_IO,an LDO chip should be provided to drop the 3.3V to 1.8V to supply power to the I/Os. We recommend the TPS78318 for the LDO.
In this power configuration mode, the CL1.5_LDO_IN(Class 1.5 Power Amplifier LDO input) and MLDO_IN(Main LDO input) is connected to the battery (VBAT or VDD_IN). The following table summarizes the specifications for the power inputs:
|Power Pins||Nominal Voltage||Voltage Range||Max Current|
|VDD_IO||1.8 V||1.62- 1.92 V||1 mA|
|VDD_IN||3.6 V||2.2 - 4.8 V||150 mA|
Refer to the datasheet for further specifications.
Two clocks are required by the device: a fast clock and a slow clock. Note that the Modules already include a fast clock and thus only a 32.768KHz slow clock is required. Otherwise, a 26MHz fast clock and a 32.768KHz slow clock should be provided. For proper start-up, these guidelines must be followed as described in this page. This applies to both devices and modules. Since the CC256x requires a 1.8V signal, voltage translation might be necessary to meet this specification.
|Slow Clock||32.768 KHz||±250 ppm|
|Fast Clock||26 MHz||±20 ppm|
Figure: Fast Clock using External Crystal
If using a module, the fast clock is inside the module. Otherwise a 26MHz crystal should be placed as close to the chip as possible. The typical values for the trimming capacitors for the crystal, C1 and C2, are listed in the table below. Please refer to the datasheet for the recommended crystal and clock configurations.
|FREQ (MHz)||C1 (pF)||C2 (pF)|
|26||15pF typ||15pF typ|
The slow clock can be provided from several sources including: external crystal oscillator and host processor. In either case, it must be 32.768 kHz ±250 ppm within a range of 0 to 1.8V.
Supplied by External Crystal Oscillator
Note: Circuit shown has oscillator disabled (R35 = 0Ohm). Do not place R35 to enable slow clock.
The part number for the slow clock is ASH7K-32.768KHZ-T from Abracon Corporation.
Figure: Slow Clock in QFN Design
Supplied by Host Processor
Some microcontrollers provide clock outputs. For example, the MSP430 has ACLK pin which is output to the BT for supplying the 32KHz slow clock from an oscillator. In the figure above, the 32kHz clock is directly interfaced with the MSP430 which then outputs it to the CC256x Bluetooth device.
nSHUTD is an active low shutdown input for the CC256x. It behaves similar to a restart switch. The following table summarizes nSHUTD functions:
|LOW||Turn off CC256x (Shutdown)|
|HIGH||Turn on CC256x|
nSHUTD is used during startup and shutdown procedures. nSHUTD is implemented as a GPIO and may require voltage translation. Refer to the datasheet for the proper sequence.
Host Controller Interface
The CC256x device requires an HCI interface which uses the H4 UART protocol. The CC256x uses HCI_TX and HCI_RX lines to transmit and receive data, respectively. The RTS and CTS lines are required by the CC256x for flow control. If the MCU does not support flow control, GPIOs should be used to implement flow control. All I/O pins are at 1.8 V. If the host does not output at 1.8V, a voltage translation must be performed before interfacing to the CC256x.
Universal Asynchronous Receiver/Transmitter (UART) 
Figure: UART pins on CC256x
Most MCUs have peripheral UART modules which includes RX and TX capabilities. In the case they do not, GPIOs can be used to simulate UART behavior. The default baud rate for the BT device is 115.2 kbps, 8N1 configuration as summarized in the following table:
Min: 37500 bps
Max: 4 Mbps
|Data Length||8 bits|
Note: Refer to the CC256x VS HCI Commands Document to change the baud rate.
CC256x require the use of HCI_RTS(request-to-send) and HCI_CTS(clear-to-send) lines for UART flow control. When HCI_RTS is low, the host is allowed to send data. When HCI_CTS is low(Host_RTS also low), the CC256x device is allowed to send data. It is also used to carry out a power management protocol (HCILL sleep protocol) to synchronize deep sleep mode between the host and controller. The Host_CTS should be interruptible in case the host decides to go into low power mode and needs to be woken up by HCI_RTS.
The codec interface on the CC256x consists of 4 signals(AUD_FSYNC,AUD_CLK,AUD_IN,AUD_OUT) for audio streaming. It supports both pulse-code modulation (PCM) and Integrated Interchip Sound (I2S) data format protocols. These pins can be directly connected to a dedicated codec which plays the sound through a speaker or it can be connected to general-purpose processors that can decode the data. This is an optional interface which is not required for the basic operation of the CC256x but may be required for a specific use case or application. For example, this interface is required for the Hands Free Profile and Assisted A2DP profiles.
|AUD_CLK||Input or Output||PCM clock|
|AUD_FSYNC||Input or Output||PCM frame-sync signal|
|AUD_IN||Input||PCM data input|
|AUD_OUT||Output||PCM data output|
The correct range of voltage levels must be applied to each pin as described in the datasheet for proper operation. Level shifters are used to bring down a higher voltage source to the lower voltages needed by the I/O, power, and clock ports.
Level Shifters for I/Os & Clocks
Feel free to use the reference parts used in the schematic snippets below for 3.3V to 1.8V voltage translation. You can order free samples of these parts from TI. All of following level shifters use Texas Intruments's SN74AVC4T774RSV which are used as unidirectional voltage translators.
Bluetooth RF I/O
The device requires an antenna to transmit and receive information over the air. There are two options for antennas: chip antennas or copper antennas (copper traces on PCB designed for RF propagation).
The BPF is required to pass FCC testing. It helps block spurious emissions outside of the 2.4GHz signals. One recommended BPF is the LFB212G45SG8A127.
Chip antennas are usually inexpensive, small, and less complex to integrate with a design. Some module vendors support chip antennas (either on or off the module).
Copper Antenna on PCB are almost as good as chip antenna although it might take up more board space. The CC256x QFN design uses printed PCB antenna.
Coaxial U.FL RF Port
The U.FL port is mainly used for performance evaluation during production line testing. It is used for various purposes including:
- Verify RF performance with a spectrum analyzer
- Carry out automated RF SIG tests with a CBT Bluetooth Tester
Note also that the modules do not require these RF tests since they are already certified. It is optional to carry out some acceptance tests after production.
The U.FL is usually not included in the modules and needs to taken into consideration when designing the board. The U.FL port has to share the BT_RF port with the antenna. Since they both cannot be connected at the same time to the BT_RT port, a multiplexing scheme is used to switch between the antenna and U.FL. One option is a Coaxial Connectors with Switch used in Murata's module which automatically connect/disconnects the U.FL port from BT_RF when a cable is attached/detached to the U.FL connector, respectively. Another option is to implement a simple resistor switch in which a zero ohm resistor is moved in a certain position on the PCB to connect either the antenna or the U.FL to the BT_RF.