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- 1 What is ICEPick?
- 2 What benefits does ICEpick bring?
- 3 If I am a third party tools vendor, where do I find information to support ICEPick based device?
- 4 Frequently Asked Questions
- 4.1 Q: What is the difference between ICEPICK_C and ICEPICK_D?
- 4.2 Q: What is the difference between ICEPICK_B and ICEPICK_C?
- 4.3 Q: What is the IR length of ICEpick?
- 4.4 Q: I am an emulator 3rd party, and I want to work with the OMAP3xxx. How do I get connected to the ARM Cortex A8?
- 4.5 Q: How do I add a device to the scan chain using ICEpick-C?
- 4.6 Q: How do I add a device to the scan chain using ICEpick-D?
- 4.7 Q: How do I see the ICEpick registers in CCS v4?
- 4.8 Q: I am using OMAP3, are there any special features for debugging through power transitions?
- 4.9 Q: How can I see the reset, power and/or clock status of the JTAG sub-paths in Code Composer Studio v4?
- 4.10 Q: What are the ICEpick ports for OMAP3?
What is ICEPick?
- ICEPick is TI's name for the JTAG route controller in its devices
- It offers Dynamic scan chain management within the device (Requires debugger support)
- Has the ability to interface multiple cores with different frequencies (or RTCK domains)
- It serves as a chip level TAP (Test Access Port) controller
- There are various versions of ICEPick:
- ICEPick-B - used in OMAP2420
- ICEPick-C - used in OMAP34xx, AM35x, DM350/355, DM365/368, DM6467, DM510,TMS320TCI648x, C2000 Sonata F28M3x, TMS570, TMSC674x, CC2538, OMAPL138
- ICEPick-D - used in DM814x, DM816x, OMAP44xx, OMAP46xx, OMAP543x, AM335x, TI814x, TI816x, TCI66xx, C6A816x
What benefits does ICEpick bring?
- When cores powered down they will not affect the emulator IEEE 1149.1 (JTAG) connection because their taps are not in the scan chain. Typically, a core powered down will sever the JTAG scan chain. ICEpick solves the dynamic addition/removal of taps from the scan chain preventing the scan chain from being severed, thus enabling power aware debug.
- This is a good presentation describing the functionality of the ICEPick TAP Router (or generically refered to as JTAG Route Controller or JRC).
- This is a good document describing the ICEPICK-C functionality and configuration in detail.
- For some devices, ICEPICK provides Wait_in_Reset functionality.
If I am a third party tools vendor, where do I find information to support ICEPick based device?
- The scan sequence to select a second TAP is available in the links below for both ICEPick_C and ICEPick_D.
Once the secondary TAP is selected, for example, a DAP for ARM Cortex CPUs. The ICEPick can be bypassed via corrected IR configuration. The port number for the device secondary taps are device specific. The information can be found either via the device datasheet (at www.ti.com) or the debug TRM via the emulation developer community
- The ICEPick functional specification is available via TI Emulation Developer Community. Membership information can be found on the web site.
Frequently Asked Questions
Q: What is the difference between ICEPICK_C and ICEPICK_D?
- A: ICEPick_D provides additional capabilities as summarized below:
- the number of debug taps is increased to 32 from 16 - adds non-JTAG control registers (NJCR) to support power, clock and reset management for processors/ subsystem that is not associated with a JTAG TAP, for example, the Cortex processors from ARM Ltd.
Q: What is the difference between ICEPICK_B and ICEPICK_C?
- A: The main difference between ICEpickb and ICEpickc is that ICEpick_B has only 2 bits in the JTAG IR register as opposed to ICEpickc which has 6 bits.
ICEpick_C also supports 32 router paths as opposed to 16 on ICEpickB.
Ideally we select ICEPICK_C during the CCS setup.
Q: What is the IR length of ICEpick?
- A: It has a 6-bit IR.
Q: I am an emulator 3rd party, and I want to work with the OMAP3xxx. How do I get connected to the ARM Cortex A8?
- A: You need to setup the scan chain configration to include the ARM Cortex A8 into the scan chain. For the OMAP3xxx, you could just utilize the scan sequences to get ICEpick to setup the A8 into the scan chain. Details can be found here. Generally, the most up to date information should be in either the datasheet or the Technical Reference Manual (TRM) for the device.
Q: How do I add a device to the scan chain using ICEpick-C?
- A: A description of how to add devices to a ICEpick-C scan chain is described: Media:Router_Scan_Sequence.pdf
Q: How do I add a device to the scan chain using ICEpick-D?
- A: A description of how to add devices to a ICEpick-D scan chain is described: Media:Router_Scan_Sequence-ICEpick-D.pdf
Q: How do I see the ICEpick registers in CCS v4?
- A: Go to "Window"-->Preferences, and check the box for "Show non-processor devices (i.e. routers like ICEPick and DAP).
Q: I am using OMAP3, are there any special features for debugging through power transitions?
- A: This is a good presentation describing the functionality of the ICEPick TAP Router (or generically refered to as JTAG Route Controller or JRC) and how to do some debugging through power state changes. Also see this wiki article on using the DAP to access registers via JTAG while the device is transitioning through power states.
- A: For CCS v4/5 Low Power Run is now moved to: Tools -> Debugger Options -> Generic Debugger Options view, and select "Allow power transitions while running if supported (Low power running)", then do a "run", this is the same as using the low power run menu item.
Q: How can I see the reset, power and/or clock status of the JTAG sub-paths in Code Composer Studio v4?
- A: You can see the clock and power status of each and every sub path by going to View-->Properties and by clicking on each sub path. You will get a view that looks like this:
Q: What are the ICEpick ports for OMAP3?
- A: DSP is at ICEpick port 0x11, ARM A8 is off the DAP at ICEpick port 0x13 (DAP address is at: 0xd401d030 with ID: 0xd401d030) with the A8 at address 0xd4011000.