Please note as of Wednesday, August 15th, 2018 this wiki has been set to read only. If you are a TI Employee and require Edit ability please contact x0211426 from the company directory.
NAND 8bit support
The u-boot & x-loader are written & tested only with 16 bit NANDs. Customers reported problems integrating OMAP3 with 8-bit NAND, Primarily the issue is that the GPMC registers are not configured properly. This causes the ECC engine in u-boot to generate incorrect values. Please ensure that you are configuring the GPMC registers properly for the particular type of NAND flash.
There is one more issue – 8 bit NAND’s use only 1 byte to mark bad blocks, while 16 bit NANDs use 2 bytes to mark bad blocks. The net result is that ECC bytes start from offset 1 in 8 bit NANDs whereas they start from offset 2 in 16 bit NANDs.
Refer to the NAND_8bit_OMAP3.zip contains, a simple image that you could use to write to NAND flash, a dump to show how it should look like so that you can see the ECC values (0x23, 0x23, 0). Note however that this was a 16 bit NAND, so on your NAND, only one byte in the spare area will be used for bad block information. The .s file is the source file used to build the binary.
Way to proceed:
Write the attached sec-x-loader.bin.ift into NAND using u-boot. Take a dump of sector 0 on NAND. Compare with the attached text file.
If you find any differences in the CRC in the spare area, do the following
- Cross check that you are calling the nand_ecc_hw function before writing the x-loader to NAND flash. Make usre the function omap_nand_switch_ecc() is getting called
- Cross check the GPMC register values – make sure that the NAND width is set to 8-bit and all the other register parameters are correct for your customers NAND…
- You will know you have the correct GPMC settings when you get a CRC value of 0x23, 0x23, 0
Now, the fist two ff in the spare are reserved for bad block markers in 16 bit NANDs. For 8 bit NANDs only one byte is used for marking bad blocks. To do this, you will have to modify the code of u-boot.
You will need to modify the nand_oobinfo data structure in nand.c in the board specific file for your board. Make sure the .eccps field starts from 1,2,3 for 8 bit nand (it will be 2,3,4 for 16 bit NAND)
Search for NAND_BUSWIDTH_16 macro and make sure it is being used properly in the u-boot driver code
Finally make sure you are suing the correct bad-block descriptors . (llok at mtd->priv, typecast to nand_chip nad look at the badblock_pattern field)