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Simulator FAQ

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Simulator FAQ[edit]

Simulator Platform[edit]

Q. Where can I find information on what components are modeled & supported features for a particular simulator platform?[edit]

For C6xxx Simulator refer - spru600i.pdf document.
For C55xx Simulator refer - spru599d.pdf document.
For C28xx Simulator refer - sprs466.pdf document.
For ARM Simulator refer - sprs397.pdf document.

These documents also provides information on supported features and configuration parameters for the simulator

Q. What's the difference between Functional vs Cycle Accurate simulator?[edit]

Functional simulator model the programmer view of the model where as cycle accurate simulator models the 100% pipeline and latencies.

Q. Do we have Functional and Cycle Accurate variants for all simulators?[edit]

Not in all cases. Refer to the Simulator Configurations list for CCSv4 link

Q. I don't find the Functional Simulator configurations for Cortex-M3, C6416, C6713 and DM642 in Code Composer Studio v4 General Setup. Where are those?[edit]

For the above processors, Cycle Accurate configurations are available as default. Select the Cycle Accurate configuration for a given processor and then go to Advanced Setup. Change the Simulator Type to Functional.

Q. How to pass command line argument while trying to run the program on C64x Simulator?[edit]

Code Composer Studio does not support this feature. You need to hardcode those values inside the program.

Q. What is the cycle accuracy of Simulator?[edit]

Refer the simulator cycle accuracy wiki topic - link

Q. Why Timer interrupt is not getting generated in C64x+ CPU Cycle Accurate Simulator?[edit]

Timer model is placed at address range "0x01C21400 - 0x01C217FF" & "0x01C21800 - 0x01C21BFF", which may not match your device configurations. To configure the simulator check wiki topic - C64x+ CPU Cycle Accurate Simulator
This questions is applicable for C64x+ Cycle Accurate Simulator as well, so check wiki topic - C64x+ Cycle Accurate Simulator

Q. Can I configure the cache size in C64x+ Cycle Accurate Simulator?[edit]

Yes. You can configure the cache size in the simulator via application program or at simulator bring time. Simulator by default is configured to 1MB size of PMC, DMC & UMC & configured as SRAM. Size of memory can be configured in simulator, check the wiki topic - C64x+ Cycle Accurate Simulator

Q. What is the supported memory limit on C64x+ Cycle Accurate Simulator?[edit]

Simulator support 64MB as memory limit for application, beyond that it gives an error. If you want to increase the runtime memory limit, check the wiki topic on C64x+ Cycle Accurate Simulator.

Q. Can i configure the CPU & Memory clock in Simulator?[edit]

Yes you can configure the CPU & Memory clock in simulator. Clock configuration is only applicable for cycle accurate simulator. Check the wiki topic for more details - link


Simulator Features[edit]

Q. Is AET supported on simulator?[edit]

No. Currently AET is not supported on any simulator configuration.

Q. Which all simulator platforms support watch points?[edit]

Currently watchpoint is supported in C6416 functional only.

Simulator Features - Code Coverage[edit]

Q. Does code coverage work on release/production code?[edit]

Yes, it does work and will provide function coverage information only. (Note: You need to enable “-g” option in compiler). Both function & line coverage is available on debug code.

Q. What does “Total Instruction” reported in line coverage of code coverage mean?[edit]

It shows the number of instruction executed on that line.

Q. Does code coverage work on functional simulator?[edit]

Yes, it works.

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