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StarterWare I2C

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Introduction[edit]

The I2C peripheral is serial communication device in compliance with the Philips Semiconductors Inter-IC bus (I2C-bus) specification version 2.1. The I2C module supports only Fast mode (upto 400 kbps) of operation. I2C can be configured to multiple master-transmitters and slave-receivers mode and multiple slave-transmitters and master-receivers mode. I2C also could be configured to generate DMA events to the DMA controller for transfer of data. The I2C driver library exports a set of APIs to configure and use I2C module for data transfers. The APIs are listed in include/i2c.h.

Programing Sequence[edit]

Interupt Mode[edit]

  • Configuring the I2C in master transmitter mode
    • I2C instance 0 is always on and does not require any powering up in the PSC module. However, I2C instance 1 requires powering up in the PSC module
    • The Pin multiplexing registers need to be configured for enabling the I2C_SDA and I2C_SCL pins.
    • The I2C is placed in local reset state using I2CMasterDisable()
    • The required operating clock is set using I2CMasterInitExpClk().
    • The address of the slave to be addressed is set using I2CMasterSlaveAddrSet()
    • The required I2C interrupts are enabled using I2CMasterIntEnableEx()
    • The mode of operation is set using I2CMasterControl()
      • In case of master transmitter mode of operation, the setting used is I2C_CFG_MST_TX. Optionally STOP, repeat mode also can be configured.
      • Only after the required settings the module is brought out of reset
    • Finally the data transfer is started by commanding a START on the bus using I2CMasterStart()

DMA Mode[edit]

  • In DMA mode of operation, the data transfer happens via EDMA. However, any I2C bus conditions are handled by the interrupt handler/polling.
  • EDMA needs to be first brought out of local reset by enabling the module in the Power Sleep Controller by using PSCModuleControl() for EDMA3 Channel controller and for EDMA3 Transfer controller.
  • EDMA is initialized using EDMA3Init(), the DMA channels are mapped and enabled using EDMA3RequestChannel()
  • EDMA transfer is enabled using EDMA3EnableTransfer().
  • Upon I2C reset both tx and rx events are enabled. Thus rx and tx events are disabled by using I2CDMATxRxEventDisable().
  • EDMA PaRAM set (options) for I2C transmit are set using EDMA3SetPaRAM()
  • I2C Tx DMA event generation is enabled using I2CDMATxEventEnable() API.
    • A transmit empty register condition generates a trasmit EDMA event.
    • The EDMA completion interrupt occurs after number of bytes configured in the PaRAM set are exhausted.
  • The transfer over I2C EDMA channel is disabled using EDMA3DisableTransfer()
  • The generation of I2C transmit EDMA event are disabled using I2CDMATxEventDisable()
  • The EDMA interrupt status bit for I2C is cleared using EDMA3ErrClrIntr()
  • Two interrupt handlers are registered for EDMA
    • The completion interrupt handler I2CEdmaIsr() to take action on the completion of transfer. Action usually is to disable the channel, complete the transfer.
    • The error interrupt handler I2cEdmaErrIsr() to take action on the error conditions. Action usually is to disable the channel, clear error bits and terminating the transfer

STOP Condition Generation[edit]

  • STOP can be configured to be automatically generated at the end of ICCNT number of bytes. In this case the I2C_CFG_STOP needs to be passed to I2CMasterControl and also the ICCNT should be updated with the required number of bytes using I2CSetDataCount()
  • STOP can also be generated manually. In this case I2C_CFG_STOP need not be supplied. But I2CMasterStop() can be used to set STOP manually.
  • Various combinations decide the STOP generation. Please refer to the I2C Peripheral User Guide for more details.
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