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StarterWare SPI

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Introduction[edit]

The SPI peripheral on AM1808 supports a SPI clock frequency (or SPI bus speed) between (Module Clock) / 3 and (Module Clock) / 256. SPI supports hardware handhshaking (using multiple slave chip select I/O pins and the SPI enable I/O pin) to improve overall throughput. SPI can be configured to generate events to EDMA controller to reduce CPU overhead during data transfers. StarterWare provides APIs to configure and use the SPI peripheral. These APIs are listed in include/spi.h.

Programing Sequence[edit]

Interrupt Mode[edit]

Configuring SPI in Master Mode with Chip Select

  • SPI needs to be first brought out of local reset by enabling the module in the Power Sleep Controller by using PSCModuleControl().
  • Pin multiplexing registers to enable the SPI pins(SIMO,SOMI,CLK,CS) and a standard configuration is provided as part of the function SPI1PinMuxSetup() in platform directory.
  • The SPI is placed in local reset state using SPIReset().
  • The SPI is brought of reset state using SPIOutOfReset().
  • Configure SPI to operate in Master Mode using SPIModeConfigure().
  • The required Operating Clock is Set using SPIClkConfigure().
  • Configure SPI in 3PIN or 4PIN or 5PIN mode using SPIPinControl().
  • Configure the default value to be driven on the CS pin (line) when no transmission is performed SPIDefaultCSSet().
  • Configure SPI Clock’s Phase and Polarity Using SPIConfigClkFormat(). The Clock Polarity and Phase configured needs to be compatible with clock requirements specified in flash device spec. For Example m25p80 spi flash requires active low (before and after data transfer clock is high) and in Phase Clock or active high (before and after data transfer clock is low) and out of Phase clock.
  • Configure SPI to Transmit MSB first during data transfer using SPIShiftMsbFirst(). This configuration is done as per requirement of m25p80 spi flash requirement.
  • Set the Character length using SPICharLengthSet().
  • Selecting CS pin to be driven, Format Register to be used and asserting CS pin is achieved using SPIDat1config().
  • Map the required interrupts to the interrupt line INT1 using SPIIntLevelSet().
  • Enable the required interrupts using SPIIntEnable().
  • Enable SPI communication using SPIEnable().
  • Required data is written to SPI flash using SPITransmitData1() API.
  • Data is read from SPI flash using SPIDataReceive() API.

DMA Mode[edit]

  • In DMA mode of operation, the data transfer happens via EDMA. However, SPI conditions like overrun errors etc, if required, are handled by the interrupt handler/polling.
  • EDMA needs to be first brought out of local reset by enabling the module in the Power Sleep Controller by using PSCModuleControl() for EDMA3 Channel controller and for EDMA3 Transfer controller.
  • EDMA is initialized using EDMA3Init(), the DMA channels are mapped and enabled using EDMA3RequestChannel()
  • SPI module is enabled using SPIEnable().
  • EDMA PaRAM set (options) for SPI transmit are set using EDMA3SetPaRAM(). It is to be noted that, since SPI is a transceiver device, transmit and receive EDMA parameters must be set before any transfer.
  • EDMA transfer is enabled using EDMA3EnableTransfer().
  • Chip Select(CS) line is forced to its active state before any transfer by calling SPIDat1Config() with appropriate arguments.
  • SPI DMA event generation is enabled using SPIIntEnable().
  • A transmit register empty condition generates a transmit EDMA event and a receive event is generated when a byte is received in the receive register.
  • The EDMA completion interrupt occurs after number of bytes configured in the PaRAM set are exhausted.
    • There are two edma completions, one for receive and one for transmit.
  • Two interrupt handlers are registered for EDMA
    • The completion interrupt handler EDMA3ComplHandlerIsr() to take action on the completion of transfer. Action usually is to disable the channel on completion of transfer.
    • The error interrupt handler EDMA3CCErrHandlerIsr() to take action on the error conditions. Action usually is to disable the channel, clear error bits and terminate the transfer.
  • The generation of SPI transmit and receive EDMA events are disabled using SPIIntDisable().
  • Chip Select(CS) line is forced to inactive state by invoking the API SPIDat1Config() with appropriate arguments.
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