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The universal asynchronous receiver/transmitter (UART) peripheral is a serial port that allows separate, independent transmit and receive operations. UARTs are commonly used in conjunction with communication standards such as EIA RS-232, RS-422 or RS-485. The UART takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes. Each UART contains a shift register which is the fundamental method of conversion between serial and parallel forms. UART generally has FIFO buffers that assist in transmission and reception of data. Multiple bytes can be written to the transmit FIFO at one time by the processor and the UART transmits these bytes one bit at a time. Similarly, the UART can interrupt the processor once a sizeable number of bytes are received by the UART and stored in the receiver FIFO. The use of FIFOs can reduce CPU overhead and improve the performance of the overall application. The transmit and receive FIFOs have configurable threshold levels that specify when they interrupt the processor.
These are the general guidelines for programming the UART.
- UART needs to be first brought out of local reset by enabling the module in the Power Sleep Controller by using PSCModuleControl().
- Pin multiplexing registers to enable the UART pins and a standard configuration is provided as part of the function UART2PinMuxSetup() in platform directory.
- Configure basic transfer parameters like baud rate, word length, no of stop bits, parity etc. The baud rate is configured based on the module input clock which is provided as a configuration input. This module input clock depends on the system/PLL configuration. UARTConfigSetExpClk() is the first UART API to be called during initialization which sets these parameters.
- The UART provides FIFO to buffer transmit and receive data and could be enabled if required. When the FIFO is enabled, the threshold levels to trigger receive interrupts need to be configured. UARTFIFOEnable() could be used for enabling and resetting the FIFO contents. UARTFIFOLevelSet() or UARTDMAEnable() could be used for configuring the FIFO based on non-DMA mode or DMA mode of operation.
The UART status registers can be polled for transmission or reception readiness and error status. Additionally, UART interrupts are also an efficient means to track transfer readiness and error status. In this scenario, the interrupt handler should be registered before the system interrupts and global interrupts are enabled. After these steps are taken, UART peripheral interrupts can be enabled by calling UARTIntEnable().
- In DMA mode of operation, the data transfer happens via EDMA. UART conditions are still handled by the interrupts or polling.
- EDMA needs to be first brought out of local reset by enabling the module in the Power Sleep Controller by using PSCModuleControl() for EDMA3 Channel controller and for EDMA3 Transfer controller.
- EDMA is initialized using EDMA3Init(), the DMA channels are mapped and enabled using EDMA3RequestChannel()
- EDMA PaRAM set (options) for UART transmit and receive are set using EDMA3SetPaRAM()
- EDMA transfer is enabled using EDMA3EnableTransfer().
- UART DMA event generation for UART transmit and receive is enabled using UARTDMAEnable().
- A transmit register empty/recieve byte condition generates a Tx/Rx EDMA event.
- The EDMA completion interrupt occurs after number of bytes configured in the PaRAM set are exhausted.
- The generation of UART EDMA events is disabled using UARTDMADisable()
- Two interrupt handlers are registered for EDMA
- The completion interrupt handler EDMA3ComplHandlerIsr() to take action on the completion of transfer. Action usually is to disable the channel on completion of transfer.
- The error interrupt handler EDMA3CCErrHandler() to take action on the error conditions. Action usually is to disable the channel, clear error bits and terminating the transfer
- EDMA3FreeChannel() will free the channels assigned to EDMA which will internally call EDMA3DisableTransfer() to disable the transfer over UART EDMA channel.